Xilinx ZCU104 User Manual

ZCU104 Board User Guide 87
UG1267 (v1.1) October 9, 2018 www.xilinx.com
Appendix B
Xilinx Constraints File
Overview
The Xilinx design constraints (XDC) file template for the ZCU104 board provides for designs
targeting the ZCU104 evaluation board. Net names in the constraints correlate with net
names on the latest ZCU104 evaluation board schematic. Identify the appropriate pins and
replace the net names with net names in the user RTL. See the Vivado Design Suite User
Guide: Using Constraints (UG903) [Ref 10] for more information.
The FMC connector J5 (LPC) is connected to MPSoC banks powered by the variable voltage
V
AJ_FMC
. Because different FMC cards implement different circuitry, the FMC bank I/O
standards must be uniquely defined by each customer.
IMPORTANT: The XDC file can be accessed on the Zynq UltraScale+ MPSoC ZCU104 Evaluation Kit
website.
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Xilinx ZCU104 Specifications

General

Brand	Xilinx
Model	ZCU104
Category	Motherboard
Language	English