Memory optimized (independent channel) mode
This mode supports Single Device Data Correction (SDDC) only for memory modules that use x4 device width. It does not impose any
specic slot population requirements.
Memory sparing
NOTE: To use memory sparing, this feature must be enabled in BIOS menu of System Setup.
Table 40. Memory sparing
Memory sparing (Single Rank) Memory sparing allocates one rank per channel as a spare. If
excessive correctable errors occur in a rank or channel, they are
moved to the spare area while the operating system is running to
prevent errors from causing an uncorrectable failure. Requires
population of two ranks or more per channel.
Memory sparing (Multi Rank) Memory sparing allocates two ranks per channel as a spare. If
excessive correctable errors occur in a rank or channel, they are
moved to the spare area while the operating system is running to
prevent errors from causing an uncorrectable failure. Requires
population of three ranks or more per channel.
With single rank memory sparing enabled, the system memory available to the operating system is reduced by one rank per channel. For
example, in a dual-processor conguration with twenty four 16 GB dual-rank memory modules, the available system memory is: 3/4 (ranks/
channel) × 24 (memory modules) × 16 GB = 288 GB, and not 24 (memory modules) × 16 GB = 384 GB. This calculation changes based on
if it is single rank sparing or multi rank sparing. For multi rank sparing, the multiplier changes to 1/2 (ranks/channel).
NOTE
: Memory sparing does not oer protection against a multi-bit uncorrectable error.
Memory mirroring
Memory mirroring oers the strongest memory module reliability mode, providing improved uncorrectable multi-bit failure protection. In a
mirrored conguration, the total available system memory is one half of the total installed physical memory. Half of the installed memory is
used to mirror the active memory modules. In the event of an uncorrectable error, the system switches over to the mirrored copy. This
ensures Single Device Data Correction (SDDC) and multi-bit protection.
The installation guidelines for memory modules are as follows:
• Memory modules must be identical in size, speed, and technology.
• Memory modules must be populated in sets of 6 per CPU to enable memory mirroring.
Table 41. Memory population rules
Processor Conguration Memory population Memory population information
Single CPU Optimizer (Independent channel)
population order
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12 Populate in this order, odd amount
allowed.
Mirror population order {1, 2, 3, 4, 5, 6}, {7, 8, 9, 10, 11, 12} Mirroring is supported with 6 or 12
DIMMs per CPU.
Single rank spare population order 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12 Populate in this order, odd amount
allowed. Requires two ranks or more
per channel.
Installing and removing system components 113
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