Technical specifications
7.5 Hardware descriptions
SIMATIC IPC227E
Operating Instructions, 11/2016, A5E35782395-AB
113
Internal interfaces
7.5.3.1
Overview of internal interfaces
Assignment of the PCIe x1 interface
5 SMCLK SMBUS (System Man-
JTAG2 TCK (Test Clock), clock
6 SMDAT SMBus (System Man-
JTAG3 TDI (Test Data Input)
9 JTAG1 TRST# (Test Reset)
resets the JTAG interface
+3.3 V 3.3 V power
Signal for link reactivation
13 GND Ground REFCLK+ Reference clock (differential
14 PETp0 Transmitter differential
REFCLK- Reference clock (differential
15 PETn0 Transmitter differential
GND Ground
16 GND Ground PERp0 Receiver differential pair,
17 PRSNT2# Hot-plug presence detect PERn0 Receiver differential pair,