Theory of Operation—2205 Service
The sweep ramp starts when Q536 is biased off.
The GATE signal going to the base of Q701 from the
Sweep Logic circuit turns Q7Q1 off. The timing
capacitors then begin charging at a rate set by
timing resistors R701, R7Q2 and the position of the
SEC/DiV switch S701. One end of timing resistor
R701 is connected to the wiper of R721 and the
other end is connected to the input of the Miller inte-
grator/ Due to feedback from the circuit output
through the timing capacitors, the integrator input
voltage at the gate of Q704A remains fixed and sets
a constant voltage across the timing resistors. This
constant voltage produces a constant charging cur
rent through the timing capacitors, which results in a
linearly increasing voltage ramp at the output of the
Miller Sweep circuit.
When the ramp reaches about 12 V, the Sweep
Logic circuitry starts the holdoff period in which
Q701 is turned on and the Sweep Generator is reset.
This holdoff period is necessary so that the timing
capacitors can be fully discharged before another
sweep starts. Capacitors C704 and C703 are always
in the charging circuit and are used for high sweep
speeds. For medium sweep speeds, capacitors
C701 and C702 are in series. For slow sweep
speeds, only capacitor C701 is used.
The SEC/DIV Variable circuitry uses an
operational amplifier to maintain a constant
reference voltage at one end of R721 independent of
the circuit load. The voltage applied to the timing
resistors varies with the rotational position of R721,
the SEC/DIV Variable control. A fixed dc voltage is
applied to the noninverting input of the operational
amplifier, and feedback resistors R717 and R718
establish double that voltage at the anode of VR719.
Potentiometer R722 adjusts the reference voltage
when in 0.5 ms to 10 jus SEC/DIV ranges to correct !
for mismatch between timing capacitors C701 and
C702.
Sweep Logic
The Sweep Logic circuitry controls sweep gen
eration, as a function of incoming trigger signals and
the Trigger mode selected.
NORM. When NORM trigger is selected, the cir
cuit is ready to start the sweep in response to a trig
ger signal. At the start of the sweep, a U530B has a
LO on SET (pin 12), RESET (pin 13), and D input
(pin 10). A trigger pulse received at U530B (pin 11)
will clock the LO on the D input to the Q output and
enable the sweep to start. The output of the sweep
generator is fed back via W701-4 into the potential
divider R501 and R502. This divider is arranged so
that when the ramp voltage reaches about 12 V,
U560E Is turned on, producing a LO on the input of
inverter U520A. The inverted signal of U520A is
applied to the input of U520B. The signal from U520B
is inverted by U520C to produce an OR function,
then fed to the SET input (pin 12) of U530B. This
overrides the CLOCK input of U530B and puts a HI on
the Q output (pin 15), resetting the sweep. The
sweep reset is also fed to the input (pin 12) of the
monostable U500B, which gives a holdoff time
dependent on the holdoff capacitor selected and the
variable holdoff resistor chain. The holdoff pulse
from the monostable maintains the Hi on the SET
input of U530B until the end of the holdoff period,
then the SET is driven LO, allowing the next trigger
pulse to start the sweep.
P-P AUTO. In the P-P AUTO mode, the sweep
will free-run in the absence of a trigger signal.
Should there be more than 50 ms between trigger
pulses, the : Auto Baseline circuitry consisting of
U580B, U520D, U570A and U570B wilt start a sweep.
U580B is a 20 Hz clock pulse generator. This signal
is passed through Schmitt trigger U520D to provide
a fast rise time. This is to ensure that both D inputs
of U570A and U570B switch at the same time.
With no trigger signal, the first clock pulse from
U5808 resets U570A, putting a HI on D input of
U570B. This will then be clocked (giving a LO on
TRIGGERED) when the next 50 ms pulse arrives. If
the end of sweep has occurred and the holdoff
period has elapsed, then the output of U520C will be
LO. Because TRIGGERED and P-P AUTO are both
LO, the output of U550D will put a LO on pin 7 of
U550B. As the other input is also LO, the output of
U550B will put a HI on pin 13 of U530B, forcing
GATE LO and starting a sweep.
If a trigger occurs, the HI on the D pin of U570A is
passed to the Q output of U570A, to resets U570B,
and put a HI on the TRIGGERED line. The output of
U550B will be LO, allowing U530B to respond to the
next trigger signal. When the TRIGGERED line is HI,
the TRiG'D/READY LED is turned on via U550A.
SINGLE SWEEP. When the SINGLE SWEEP mode
is selected, the SINGLE"1 SWEEP! line is LO, holding
the D input of U570A LO and effectively disabling the
Auto Baseline circuitry. This action also puts a LO on
the TRIGGERED line. At the end of a sweep, the
holdoff pulse is latched by U530A via U520B and
U550C, and the D input of U53QB is driven HI and the
sweep is disabled. The sweep is enabled by a pulse
from the single shot monostabte U500A, which
clocks the LO on the D input of U530A to the Q out
put, With a LO at the Q output of U530A, the next
trigger signal will start a sweep. Switch debounce
circuit U500A along with the timing components
R506 and C5Q6 will give a pulse width of about 30 ns,
which is shorter than the fastest sweep speed.
U500A also sets U510B turning on the TRIG’D/READY
LED via U550A. When the holdoff period starts (and
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