Theory of Operation—2230 Service
The CHOP VERTICAL MODE position grounds the
base of Q541 and puts a LO on an input, of both U555B
and U555C. The outputs of these two gates are then LO,
and the signal to the Internal Trigger Amplifier is the
summed Channel 1 and Channel 2 trigger signals, the
same as with ADD VERTICAL MODE.
A External Trigger A m plifier
The A External Trigger Amplifier buffers signals from
the EXT INPUT connector to drive the A Trigger Level
Comparator. Input signal coupling is determined by A EXT
COUPLING switch S380 which selects AC, DC, or DC
-T- 10 coupling.
When S380 is in the AC position, the input signal is ac-
coupled through C376. In the DC position, the input signal
is connected directly to the Amplifier. The DC -;- 10 posi
tion attenuates the input signal by a factor of 10 through
the compensated divider formed by R377, R378, C380,
and C381.
Line Trigger A m plifier
The Line Trigger Amplifier supplies a line-frequency
trigger signal to the A Trigger Level Comparator when the
A SOURCE switch is in the LINE position. Transformer
T390 in the Power Supply (Diagram 8) provides the line-
frequency trigger signal through R397 to Q397. Diode
CR399 is forward biased when S392 is in the LINE posi
tion, and the emitter signal of Q397 drives the A Trigger
Level Comparator.
Trigger Signal BW Lim it and HF REJ
The upper frequency of the trigger signal and the verti
cal channel bandpass are limited to 20 MHz when the
front-panel BW LIMIT switch is pressed in. The BW Limit
signal voltage forward biases Q419, and capacitor C419
shunts the higher trigger signal frequencies to ground
through the transistor. With full 100 MHz bandwidth, Q419
is biased off to remove the shunting effect from the trigger
signal line.
An additional bandwidth limiting circuit provides high-
frequency rejection of the trigger signal. HF REJ is enabled
when the center knob of the A TRIGGER LEVEL control is
rotated clockwise. With HF REJ, Q7362 is biased on, and
capacitor C7362 shunts trigger signal frequencies above
about 50 kHz to ground through the transistor.
P-P Auto Trigger Level
The P-P Auto Trigger Level circuit sets voltage levels at
the ends of the A TRIGGER LEVEL potentiometer (R438)
as a function of the A Trigger mode selection and the
trigger signals selected by the A SOURCE switch.
In the P-P AUTO and TV FIELD Trigger modes, Q413
is biased off, and CR414 and CR415 are reverse biased.
Trigger signals selected by the A SOURCE switch are sent
to peak detector circuits formed by Q420-Q422 and
Q421-Q423 via R420. These peak detectors track dc lev
els and have high voltage-transfer efficiency. The circuit
arrangement of the transistors produces very low thermal
drift and reduces the effect of differences in transistor
characteristics.
The positive- and negative-peak signal levels are stored
by hold capacitors C414 and C415. The charge on the
capacitors is held near the peak voltage levels between
trigger signal peaks by the long time constant discharge
path through R426 and R427. Amplifiers U426A and
U426B are voltage followers with feedback supplied by
transistors Q428 and Q429. These feedback transistors
compensate the P-P Auto Trigger Level circuit for any
thermal drift of Q420 and Q421 and shift the output levels
of the voltage followers back to the original dc levels of
the input trigger signal peaks. The output of U426A is the
positive peak voltage of the input trigger signal, and the
output of U425B is the negative peak voltage. Auto Level
Adjustment potentiometers R434 and R435 provide dc
offset corrections to make certain that the output voltages
applied to the ends of LEVEL potentiometer R438 remain
at or just below the actual peaks of the input trigger sig
nal. In this way, the range of the LEVEL control is held
within the peak-to-peak limits of the applied trigger signal
for ease in triggering the oscilloscope.
In NORM Trigger mode, +8.6 V is applied to the junc
tion of R411 and R414. Diode CR414 is forward biased.
Transistor Q413 is also turned on inverting the applied sig
nal and forward biasing CR415. Input transistors Q420
and Q421 are then biased off, and no trigger signals reach
the P-P Auto Trigger Level circuit. In this case, the inputs
to U426A and U426B are fixed voltages, and the voltage
levels applied to the ends of the LEVEL potentiometer are
independent of trigger-signal amplitude. The user must
then adjust the LEVEL control to the correct level to
obtain triggering.
The Microprocessor is informed of the trigger mode by
Q7440 and its associated biasing resistors. When the P-P
signal line is a LO at —8.3 V (indicating that the P-P
AUTO Trigger mode is in effect), Q7440 is biased off, and
its collector (and the PP signal line to the I/O circuit board)
is pulled up to the +5 V supply via R7442. When the P-P
signal is a HI at +8.5 V for NORM Trigger mode, Q7440
is biased on, and the PP signal is pulled LO by the con
ducting transistor.
A Trigger Level Comparator and Schmitt Trigger
The A Trigger Level Comparator compares the level of (
trigger signals selected by the A TRIGGER SOURCE
3-16
To Next Page
Loading...
Need help?
General
