Theory of Operation—2230 Service
their respective chokes. Feedback is applied to the com
parators causing duty cycle and frequency modulation,
which adjusts output power accordingly.
+5 VOLT POWER SUPPLY. Logic power (+5 V) for all
I/O board and Vector Generator board circuitry is gen
erated from the +8.6 V supply by U6201.
+ 5 VOLT REFERENCE. The 5 Volt Reference is gen
erated by U6302. It is used by the vector generator cir
cuits, status A/D circuit, display DAC circuit, and acquisi
tion system. Associated with each of these circuits is a
local pull-up resistor from the +8.6 V supply to the 5V
reference line to supply nominal load current so that
U6302 does not have to supply the total load current. This
also greatly reduces the reference line current which could
cause excessive voltage drops at the far ends of its travel.
Status ADC and Bus Interface
I/O PORTS. The system data bus and associated con
trol signals are sent to the I/O board via J6100 (see
Diagram 19). Input ports U6102 and U6103 transfer logic
signals representing instrument status. U6103 operates as
a simple port for eight of the status lines. U6102 has 15
input signals. It serves as a data buffer for the Status A/D
converter U6105, when required. During part of the status
scanning cycle, U6105 data outputs are tri-stated, and
seven additional status signals are applied via 22 kn resis
tors (R6121 through R6126). The Microprocessor then
reads these status lines through U6102. When U6105 is
active, its outputs dominate the data lines and the 22 kO
resistors act as high impedance loads. The Microprocessor
can then read the data from U6105 via U6102. Output
port U6104 is used to control the operation of U6105 to
perform the A/D conversion function. U6104 is also the
multiplexer selection register, driving U6106 and U6108,
which select the analog status signals to be measured.
The port address selection is made by combinations of
control lines 10-0, and 10-1, and address lines A2 and A3.
U6101A and B provide the selection logic for U6104.
STATUS A/D. U6105 is a 10-bit A/D converter which
allows measurement of analog status signals. After each
conversion it produces an interrupt which is gated by
U6101D and applied to Q6201 via R6218. This produces a
processor interrupt to indicate completion of its task. This
interrupt is maskable by U6104. U6107A serves as a
buffer amplifier to drive the input resistance of U6105 while
maintaining fairly high load impedance for U6106 and
U6108. U6107B and U6107C are differential amplifiers
which convert the differential vertical position signals to
single voltage levels within the range of the measuring
system.
POWER INPUT, PREREGULATOR
AND INVERTER
The Power Supply (see Diagram 8 and Diagram 9)
changes the ac power-line voltage into the voltages
needed for instrument operation. It consists of the Power
Input, Preregulator, and Inverter circuits (which drive the
primary of the power transformer) and secondary circuits
(which produce the necessary supply voltages for the
instrument).
Power Input
The Power Input circuit changes the ac power-line volt
age to filtered dc for use by the Preregulator.
POWER switch S901 connects the ac power line
through fuse F9001 to the bridge rectifier formed by
CR901, CR902, CR903, and CR904. The full-wave bridge
rectifies the source voltage, and the output is filtered by
C906. Input surge current at instrument power-on is lim
ited by thermistor RT901. The thermistor resistance is
moderately high when the power is first turned on, but
decreases as the input current warms the device. The
instrument is protected from large voltage transients by
suppressor VR901. Conducted interference originating
within the power supply is attenuated by common-mode
transformer T901, differential-mode transformer T903, line
filter FL9001, and capacitors C900, C902, and C903.
Preregulator
The Preregulator provides a regulated dc output voltage
for use by the Inverter circuitry.
When the instrument is turned on, the voltage
developed across C906 charges C925 through R926.
When the voltage across C925 has risen to a level high
enough that Pulse-Width Modulator U930 can reliably drive
Q9070, U930 receives operating supply voltage through
Q930. This voltage level is set by zener diode VR925 in
the emitter cf Q928 and by the voltage divider formed by
R925 and R927. The zener diode keeps Q928 biased off
until the base voltage reaches approximately 6.9 V. At that
point, Q928 is biased into conduction, and the resulting
collector current causes a voltage drop across R929 that
biases on Q930. The positive feedback through R930 rein
forces the turn-on of Q928, which quickly drives both
Q928 and Q930 into saturation. Once Q930 is on, the
Pulse-Width Modulator begins to function.
Pulse-Width Modulator U930 controls the output volt
age of the Preregulator by regulating the duty cycle of the
pulse going to the gate of Q9070. The modulator has an
3-47
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