Theory of Operation—2230 Service
switch to the voltage set by the A TRIGGER LEVEL con
trol and produces an output trigger signal at the correct
level. Rising or falling slope triggering is selected by the
front-panel A TRIGGER SLOPE switch.
Integrated circuit U460, contains the A Trigger Level
Comparator and Schmitt Trigger circuitry. The output volt
age of the trigger amplifiers are applied to U460 pin 4. The
other input to the comparator is the wiper voltage on the
A Trigger LEVEL control, applied to pin 2 of U460. The
resistor R452 and the voltage at pin 5 of U460 sets the
emitter current for the comparator.
The Trigger Slope is determined by the relative voltages
on U460 pins 7 and 8. If pin 8 is at a higher level than
pin 7, the plus output of U460 will change to a HI state
when a positive-going input signal crosses the threshold at
pin 2 of U460. With pin 8 more negative than pin 7, the
Schmitt fires on a negative-going input. The voltage at
pin 7 is fixed, while that at pin 8 is selected by the A
TRIGGER SLOPE switch S460 through R459, R461, and
R462.
The sensitivity of the Schmitt Trigger is controlled by
the current at pin 9. The setting of R471 determines the
circuit hysteresis.
The outputs of the Schmitt Trigger are at pins 10 and
12 of U460. The outputs are at ECL levels and are from
emitter followers internal to U460. Collector voltage to
U460 is supplied through pins 11 and 14. When TV Field is
not selected, the SS line connected to CR476 and R473 is
LO. Transistors Q473 and Q474 are biased off which also
biases Q487 off. Resistor R477 biases CR467 and CR477
on and the +Out Trigger signal from pin 10 of U460
passes through the diodes to U506-6 of the A Sweep
Generator.
TV Trigger Circuit
When TV FIELD mode is selected the S5 line is HI.
This disconnects the high-speed trigger path by reverse
biasing CR467 and CR477. Setting the A Trigger level
threshold near the center of the horizontal-sync-pulse
swing establishes the untriggered level. This in
combination with the peak detectors makes the circuit
insensitive to the video information. The A TRIGGER and
LEVEL controls are set to provide a pulse-train
corresponding to the sync pulses of the TV signal. This
pulse train is filtered by R467, C467, R468, R469, C469,
and R470, resulting in dc levels at the bases of Q473 and
Q474. The untriggered level (horizontal pulses) turns Q474
on, which causes Q487 to conduct, providing a LO to the
sweep generator. When the TV-Vertical-Sync block occurs
the polarity reverses, turning Q487 off and providing a
positive-going signal to U506 pin 6 to initiate a sweep.
A SWEEP GENERATOR AND LOGIC
The A Sweep Generator and Logic circuitry, shown on
Diagram 5, produces a linear voltage ramp that drives the
Horizontal Preamplifier in the Nonstore mode. The Sweep
Generator circuits also produce gate signals that time the
crt unblanking and intensity levels for viewing the Nonstore
displays. In STORE mode, the A Sweep Generator and
Logic circuitry continues to produce timing gates used by
the Storage circuitry for triggering the analog signal
acquisitions. See Figure 3-5 for the block diagram of the A
Sweep Generator and Logic circuitry.
The Sweep Logic circuitry controls the Nonstore hold-
off time and generates gating signals that start the sweep
when a trigger signal occurs and end the sweep at the
proper level. When using P-P AUTO or TV FIELD trigger
ing, the Sweep Logic circuitry causes the Sweep Genera
tor to free run if a trigger signal is not received or does not
come often enough.
A M iller Sweep G enerator and SEC/DIV S witching
The A Miller Sweep Generator is an integrator circuit
that produces a linear voltage ramp to drive the Horizontal
Amplifier for the Nonstore A Sweep deflection. It produces
the ramp voltage by maintaining a constant current
through timing capacitors, causing a linear voltage rise
across them as they charge.
Field-effect transistors Q704A and Q704B are matched
devices with Q704B acting as the current source for
Q704A. Since the gate and source of Q704B are con
nected together with no voltage difference between them,
the source current available to Q704A is just enough so
that there is no voltage drop across the gate-source junc
tion of Q704A.
When the sweep is not running, Q701 is biased on,
holding the selected timing capacitors discharged. The low
impedance of Q701 in the feedback path holds the A Miller
Sweep output (A SWEEP) near ground potential. The volt
age across Q701, in addition to the base-emitter voltage of
Q706, prevents Q706 from becoming saturated.
A sweep ramp is started when Q576 is biased off. The
A GATE signal going to the base of Q701 from the Sweep
Logic circuit turns 0701 off. The timing capacitors then
begin charging at a rate set by timing resistors R701,
R702, and the selected timing capacitors. Due to feedback
from the circuit output through the timing capacitors, the
integrator input voltage at the gate of Q704A remains
fixed and sets a constant voltage across the timing resis
tors. This constant voltage produces a constant charging
3-17
To Next Page
Loading...
Need help?
General
