Comparator U2510 compares the analog voltage of
each pot to the output voltage from the DAC (pin 18). To
determine the potentiometer output voltage, the processor
performs a binary search routine that changes the output
voltage from the DAC in an orderly fashion until it most
closely approximates the voltage from the pot.
The conversion algorithm is similar to successive
approximation and generates an eight-bit representation of
the analog level. When the pot's value is determined, the
Microprocessor stores that value in memory. Once all of
the pots have been read and the initial value of each has
been stored, the processor uses a shorter routine to deter-
mine if any pot setting changes. To do this the DAC out-
put is set to the last known value of the pot (plus and
minus a small drift value), and the status bit is read to see
that a HI and LO occurs. If within the limits, the processor
assumes that the pot setting has not changed and scans
the next pot. When the processor detects that a pot set-
ting has changed, it does another binary search routine to
find the new value of that pot.
Analog Control
The operating mode and status of the instrument
requires that various analog voltages (for controlling instru-
ment functions) be set and updated. The digital values of
the controlling voltages are generated by the Microproces-
sor and converted by the DAC. Analog multiplexers U2521
and U2530 (on diagram 2) and U170 (on diagram 4) route
the DAC voltages to sample-and-hold circuits that maintain
the control voltages between updates.
The Microprocessor writes three selection bits to regis-
ter U2301 that directs the DAC output to the appropriate
sample-and-hold circuit and charges a capacitor (or capac-
itors) to the level of the DAC. When the processor discon-
nects the DAC voltage from the sample-and-hold circuit
(by disabling the multiplexer) the capacitor(s) remains
charged and holds the control voltage near the level set by
the DAC. Due to the extremely high input impedance of
the associated operational amplifiers, the charge on the
capacitor(s) remains nearly constant between updates.
FRONT-PANEL CONTROLS
The Front Panel is the operator's interface for control-
ling the user-selectable oscilloscope functions. Along with
the crt, it provides visual feedback to the user about the
present operating state of the instrument.
Theory of Operation—2465B/2467B Service
Most of the Front-Panel controls (diagram 3) are
"cold"
controls; i.e., they are not connected directly into the
sig-
nal
path.
Therefore, associated circuits are not influenced
by the physical parameters (such as capacitance, resis-
tance,
and inductance) of the controls. In addition,
translating the analog output levels of most of the poten-
tiometers to digital equivalents allows the processor to
handle the data in ways that result in a variety of
enhanced control features.
To maintain the front-panel operating setup between
uses of the instrument, the digitized values of the poten-
tiometers and front-panel switch settings are stored in bat-
tery backed up RAM so that when the instrument power is
turned off, these control settings are not lost. Then, when
power is next applied, the instrument will power up to the
same configuration as when the power was last removed
(assuming the settings of the non-digitized pots and
switches remain the same).
The Front-Panel Controls also allow the user to initiate
and direct the diagnostic routines (and when enabled, the
calibration routines) programmed into the read-only
memory (ROM). These routines are explained in the
Maintenance section of this manual.
Front-Panel Switches
The Front Panel Switches are arranged in a ten-row-
by-five-column matrix, with each switch assigned a unique
location within the matrix (see Figure 3-3). A closed switch
connects a row and a column together through an isolat-
ing diode. To detect a switch closure, the switch matrix is
scanned once every 32 ms (every tenth Microprocessor
interrupt cycle). When scanning, the Microprocessor
sequentially sets each individual row line LO. A closed
switch enables the LO to be passed through the associ-
ated diode to a column line. When the processor checks
each of the five column lines associated with the selected
row, the LO column is detected. The intersection of the
selected row and the detected column uniquely identifies
the switch that is closed. Further information about switch
scanning is found in the "Front-Panel Scanning" descrip-
tion located in the "Analog Control" discussion.
As each switch is
read,
the processor compares the
present state of the switch to its last-known state (stored
in memory) and, if the same, advances to check the next
switch.
When a switch is detected as having changed, the
processor immediately reconfigures the setup conditions to
reflect the mode change and stores the new state of the
switch in memory. The detected status of the switch on
each of the following scan cycles is then compared against
the new stored data to determine if the switch changes
3a-11
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