0 OCx-ds3 Differential 0 ACQUIRED n/a 0/1
(Port/t3)
Router# show running-config | section recovered-clock 0 4
recovered-clock 0 4
clock recovered 20 differential cem 6 0
Configuring ACR in Mode CT3 for CESoPSN
You must configure ACR in mode CT3. Mode CT3 is an STS-1 carrying a DS3 signal that is divided into 28
T1s (PDH).
enable
configure terminal
controller sonet <bay>/<slot>/<port>
rate OC3
sts-1 <num>
mode ct3
t1 <t1_num> clock source recovered <clock-id>
t1 <t1_num> cem-group < cem-group-no> timeslots <1-24>
recovered-clock <bay> <slot>
clock recovered <clock-id> adaptive cem <port-no> <cem-group-no>
Verification of EPAR Configuration
The following example shows the configuration of EPAR for STS-3c with negative pointer adjustment events
signaled using N-bits.
Router#show cem circuit interface cem 0/4/4 104
CEM0/4/4, ID: 104, Line: UP, Admin: UP, Ckt: ACTIVE
Controller state: up, CEP state: up
Idle Pattern: 0xFF, Idle CAS: 0x8
Dejitter: 6 (In use: 0)
Payload Size: 783
Framing: Not-Applicable
CEM Defects Set
None
Signalling: No CAS
RTP: No RTP
Ingress Pkts: 8507028158 Dropped: 0
Egress Pkts: 8507028151 Dropped: 0
CEM Counter Details
Input Errors: 0 Output Errors: 0
Pkts Missing: 0 Pkts Reordered: 0
Misorder Drops: 0 JitterBuf Underrun: 0
Error Sec: 0 Severly Errored Sec: 0
Unavailable Sec: 0 Failure Counts: 0
Pkts Malformed: 0 JitterBuf Overrun: 0
Generated Lbits: 0 Received Lbits: 0
Generated Rbits: 0 Received Rbits: 0
Generated Nbits: 81794328 Received Nbits: 81794328
Generated Pbits: 0 Received Pbits: 0
1-Port OC-192 or 8-Port Low Rate CEM Interface Module Configuration Guide, Cisco IOS XE Everest 16.7.x (Cisco
ASR 900 Series)
145
Clock Recovery System for SAToP
Configuring ACR in Mode CT3 for CESoPSN