Revision B
5-1
MAC 5000 resting ECG analysis system
2000657-002
5 CPU Theory of Operation
General Description ..................................................................... 3
Block Diagram ....................................................................................... 4
Theory of Operation ..................................................................... 6
Clocks .................................................................................................... 6
CPU ........................................................................................................ 6
FPGA ...................................................................................................... 6
Bootstrap Instruction Unpacker ................................................7
EDO DRAM Controller ..............................................................7
XBus Controller ........................................................................7
LCD Controller VLB Bus Cycle Interface ...................................7
Video Waveform Scrolling ........................................................8
Interrupt Controller ...................................................................9
System Interrupt Generator ......................................................9
Acquisition Module Interface ....................................................9
Thermal Printhead Interface ...................................................10
Serial EEPROM Interface ........................................................10
BBus Interface ........................................................................10
UARTS ....................................................................................11
PWM Analog Outputs .............................................................11
Beep Generator .......................................................................11
DRAM .................................................................................................. 12
SmartMedia Card ................................................................................. 12
Serial EEPROM .................................................................................... 12
VGA LCD/CRT Interface ....................................................................... 12
Acquisition Module Transceiver/Power Switch .................................... 12
Thermal Printhead Power/Pixel Test Logic .......................................... 12
SuperIO Peripheral Controller .............................................................. 13
Floppy Drive Support ..............................................................13
Four RS-232 Serial Ports (one dual mode RS-232/IrDA) .......13
Clock/Calendar .......................................................................13
External PS-2 Keyboard Port ..................................................13
General Purpose Parallel I/O Lines .........................................13
The Four Stooges ................................................................................. 13
Startup Self Identification .......................................................14
BBus .......................................................................................14
Curly .......................................................................................14
Shemp ....................................................................................14
Larry .......................................................................................15
Moe ........................................................................................15
Untested "Nominal" Operating Time Specs ........................................... 19