GE PACE Series User Manual

3 Status System
K0472 Revision A 3 - 4
3.2 Standard event group
The standard event group are 8 bit registers that are read by the IEEE 488 standard
commands. The event register is cleared by reading it; the event and enable registers are
cleared by the *CLS command.
Bits within the standard event condition register are set by system errors and events. In
addition to setting the status bits, a text message will be placed in the error queue. The ESB
bit in the status byte sets if the associated bit in the event enable register is set. The enable
register may be set through the *ESE command so that selected standard events cause the
ESB bit to be set. The system events that set each bit are as follows:
Table 3-1 Standard Event Register
Bit Name Description Meaning/data
0 OPC Not used Reserved currently returns 0
1 RQC Not used Reserved currently returns 0
2 QYE -400 to -499 Query errors
3 DDE Not used Reserved currently returns 0
4 EXE -200 to -299 Execution errors
5 CME -100 to -199 Command errors
6 URQ Not used Reserved currently returns 0
7 PON Not used Reserved currently returns 0

GE PACE Series Specifications

General

Brand	GE
Model	PACE Series
Category	Test Equipment
Language	English