8-6 Status Structure
Status byte and service request (SRQ)
Service request is controlled by two 8-bit registers; the status byte register and the service
request enable register. Figure 8-3 shows the structure of these registers.
Status Summary Messages (6)
OSB
(B7)
RQS
(B6)
MSS
ESB
(B5)
MAV
(B4)
QSB
(B3)
EAV
(B2)
(B1)
(B0)
OR
* SRE
* SRE?
Status Byte
Register
Service Request
Enable Register
OSB = Operation Summary Bit
MSS = Master Summary Status
RQS = Request for Service
ESB = Event Summary Bit
MAV = Message Available
QSB = Questionable Summary Bit
EAV = Error Available
MSB = Measurement Summary Bit
& = Logical AND
OR = Logical OR
OSB
(B7) (B6)
ESB
(B5)
MAV
(B4)
QSB
(B3)
EAV
(B2)
(B1)
(B0)
&
&
&
&
&
MSB
MSB
&
128
(2
7
)
32
(2
5
)
16
(2
4
)
8
(2
3
)
4
(2
2
)
1
(2
0
)
Decimal
Weights
* STB?
Serial Poll
Service
Request
Generation
Figure 8-3
Status byte and service request
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