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NI 6612
National Instruments NI 6612 User Manual
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PCIe-6612
2
Table of Contents
NI 6612 User Manual
2
Support
3
Worldwide Technical Support and Product Information
3
Worldwide Offices
3
National Instruments Corporate Headquarters
3
Important Information
4
Warranty
4
Copyright
4
End-User License Agreements and Third-Party Legal Notices
4
Trademarks
4
Patents
5
Export Compliance Information
5
WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS
5
Compliance
6
Contents
7
About This Manual
12
Related Documentation
12
Chapter 1 Introduction
13
Installation
13
Accessories and Cables
13
Table 1-1. Accessories and Cables
14
Chapter 2 Digital I/O
15
Table 2-1. DIO Features on Ports 0 and 1
15
Figure 2-1. Digital I/O Circuitry on Port 0
16
Figure 2-2. Digital I/O Circuitry on Port 1
16
Table 2-2. Lines Without a Populated CI
17
Digital Input Data Acquisition Methods
17
Software-Timed Acquisitions
17
Hardware-Timed Acquisitions
17
Digital Input Triggering
18
Digital Waveform Acquisition
19
Figure 2-3. Digital Input Timing Options
19
DI Sample Clock Signal
19
Routing DI Sample Clock to an Output Terminal
20
Other Timing Requirements
20
Figure 2-4. DI Sample Clock and DI Start Trigger
20
DI Sample Clock Timebase Signal
20
DI Start Trigger Signal
21
Retriggerable DI
21
Figure 2-5. Retriggerable DI
21
Using a Digital Source
22
Routing DI Start Trigger to an Output Terminal
22
DI Reference Trigger Signal
22
Figure 2-6. Reference Trigger Final Buffer
23
Using a Digital Source
23
Routing DI Reference Trigger Signal to an Output Terminal
23
DI Pause Trigger Signal
23
Figure 2-7. Halt (Internal Clock) and Free Running (External Clock)
24
Using a Digital Source
24
Routing DI Pause Trigger Signal to an Output Terminal
24
Digital Output Data Generation Methods
24
Software-Timed Generations
24
Hardware-Timed Generations
25
Digital Output Triggering
26
Digital Waveform Generation
26
DO Sample Clock Signal
27
Routing DO Sample Clock to an Output Terminal
27
Other Timing Requirements
27
Figure 2-8. DO Sample Clock and DO Start Trigger
27
DO Sample Clock Timebase Signal
27
DO Start Trigger Signal
28
Retriggerable DO
28
Figure 2-9. Retriggerable DO
28
Using a Digital Start Trigger
28
Routing DO Start Trigger Signal to an Output Terminal
28
DO Pause Trigger Signal
29
Figure 2-10. DO Pause Trigger with the Onboard Clock Source
29
Figure 2-11. DO Pause Trigger with Other Signal Sources
29
Using a Digital Pause Trigger
29
Routing DO Pause Trigger Signal to an Output Terminal
29
I/O Protection
30
DI Change Detection
30
Figure 2-12. DI Change Detection
30
DI Change Detection Applications
31
Digital Filtering
31
Table 2-3. Filters
32
Figure 2-13. Input Low-to-High Transition
32
Figure 2-14. Case 1
33
Figure 2-15. Case 2
33
Figure 2-16. Line and Bus Filtering
34
Connecting Digital I/O Signals
34
Figure 2-17. Digital I/O Connections
35
Getting Started with DIO Applications in Software
35
Signal Integrity Considerations
36
Chapter 3 Counters
37
Figure 3-1. Counter 0 and Frequency Generator
37
Counter Input Applications
38
Edge Counting
38
Figure 3-2. Edge Counting
38
Channel Settings
38
Timing Settings
39
Figure 3-3. Edge Counting: On-Demand Timing
39
Figure 3-4. Edge Counting: Sample Clock Timing
40
Trigger Settings
40
Figure 3-5. Edge Counting: Using an Arm Start Trigger
40
Figure 3-6. Edge Counting: Using a Pause Trigger
41
Figure 3-7. Edge Counting: Using a Reset Trigger
41
Other Settings
42
Exporting a Terminal Count Signal
42
Cascading Counters
42
Pulse Measurement
42
Figure 3-8. Pulse Measurement
43
Create Channel
43
Channel Settings
43
Timing Settings
44
Figure 3-9. Pulse Measurement: Implicit Timing
44
Figure 3-10. Pulse Measurement: Sample Clock Timing
45
Trigger Settings
45
Figure 3-11. Pulse Measurement: Using Arm Start Trigger
45
Other Settings
46
Semi-Period Measurement
46
Figure 3-12. Semi-Period Measurement
46
Settings
46
Frequency Measurement
47
Frequency Measurement Considerations
47
Table 3-1. Frequency Measurement Methods
47
Figure 3-13. Frequency Measurement Using Time
47
Figure 3-14. Frequency Measurement Using Periods
48
Frequency Measurement Methods
48
Figure 3-15. Frequency Measurement: Sample Clock with Averaging
49
Figure 3-16. Frequency Measurement: Sample Clock without Averaging
50
Figure 3-17. Frequency Measurement: Low Frequency with One Counter
51
Figure 3-18. Frequency Measurement: Large Range of Frequencies with Two Counters
52
Figure 3-19. Frequency Measurement: High Frequency with Two Counters
54
Period Measurement
55
Pulse-Width Measurement
55
Figure 3-20. Pulse-Width Measurement
55
Channel Settings
56
Timing Settings
56
Figure 3-21. Pulse-Width Measurement: Implicit Timing
57
Figure 3-22. Pulse-Width Measurement: Sample Clock
57
Trigger Settings
57
Figure 3-23. Pulse-Width Measurement: Using the Arm Start Trigger
58
Other Settings
58
Two-Edge Separation
58
Figure 3-24. Two-Edge Separation Measurement
58
Channel Settings
59
Timing Settings
59
Figure 3-25. Two-Edge Separation Measurement: Implicit Timing
60
Figure 3-26. Two-Edge Separation Measurement: Sample Clock Timing
60
Trigger Settings
60
Other Settings
61
Quadrature and Two-Pulse Encoder Overview
61
Quadrature Encoders
61
Figure 3-27. X1 Encoding
61
Figure 3-28. X2 Encoding
61
Figure 3-29. X4 Encoding
62
Figure 3-30. Channel Z Reload with X4 Decoding
62
Two-Pulse Encoders
63
Figure 3-31. Measurements Using Two Pulse Encoders
63
Angular Position Measurement
63
Create Channel
63
Channel Settings
63
Timing Settings
64
Figure 3-32. Angular Position: On-Demand Timing
64
Figure 3-33. Angular Position: Sample Clock Timing
64
Trigger Settings
65
Other Settings
65
Linear Position Measurement
65
Counter Output Applications
65
Figure 3-34. Samples of Counter Output Applications
66
Generating a Series of One or More Pulses
66
Create Channel
66
Figure 3-35. Specifying Pulses
66
Channel Settings
67
Timing Settings
67
Triggering Setting
67
Figure 3-36. Start Trigger Initiates Pulse Generation
67
Figure 3-37. Retriggerable Pulse Generation
68
Generating a Waveform with Constant Frequency and Duty Cycle
68
Figure 3-38. Waveform with Constant Frequency and Duty Cycle
68
Create Channel
68
Channel Settings
69
Timing Settings
69
Triggering Setting
69
Figure 3-39. Start Trigger Initiates Waveform Generation
69
Generating a Waveform with Variable Frequency and Duty Cycle
70
Figure 3-40. Waveform with Variable Frequency and Duty Cycle
70
Create Channel
70
Channel Settings
71
Timing Settings
71
Triggering Settings
71
Buffer Considerations
71
Generating Complex Digital Waveform or Timing Pattern
72
Figure 3-41. Complex Digital Waveform
72
Create Channel
72
Channel Settings
72
Timing Settings
73
Triggering Setting
73
Buffer Considerations
73
Other Features
73
Frequency Division
73
Frequency Generator
74
Figure 3-42. Frequency Generator Circuitry
74
Chapter 4 PFI
75
Figure 4-1. PFI Circuitry
75
Using PFI Terminals as Timing Input Signals
76
Exporting Timing Output Signals Using PFI Terminals
76
Using PFI Terminals as Static Digital I/Os
77
Using PFI Terminals to Digital Detection Events
77
Connecting PFI Input Signals
77
Figure 4-2. PFI Input Signal Connections
77
PFI Filters
77
Table 4-1. Filters
78
Figure 4-3. Filter Example
78
I/O Protection
79
Signal Integrity Considerations
79
Figure 4-4. Parallel and Series Termination
79
Figure 4-5. Twisted-Pair Wiring
80
Table 4-2. Signals and D GND Pin Number on 68-Pin Screw Terminal Accessory
80
Chapter 5 Counter Signal Routing and Clock Generation
82
Clock Routing
82
Figure 5-1. Clock Routing Circuitry
82
100 MHz Timebase
83
20 MHz Timebase
83
100 kHz Timebase
83
External Reference Clock
83
10 MHz Reference Clock
84
PXIe_CLK100 (NI PXIe-6612 Only)
84
PXIe_SYNC100 (NI PXIe-6612 Only)
84
PXI_CLK10 (NI PXIe-6612 Only)
84
Default Routing
84
Table 5-1. Default Routing for Counter Input Signals
85
Table 5-2. Default Routing for Counter Output Signals
85
Routing Options
86
Matching Routing Terminology
86
Table 5-3. Matching Routing Terminology
86
Synchronizing Multiple Devices
87
PXI Express Devices
87
PCI Express Devices
88
Real-Time System Integration (RTSI)
88
Figure 5-2. NI PCIe-6612 RTSI Pinout
88
Table 5-4. RTSI Signals
88
Using RTSI as Outputs
89
Using RTSI Terminals as Timing Input Signals
89
RTSI Filters
90
PXI Trigger Signals (NI PXIe-6612 Only)
90
PXI_Trigger<0..7>
90
PXI_STAR
90
PXIe-DSTAR<A..C>
91
Table 5-5. PXIe-DSTAR Line Descriptions
91
Chapter 6 Bus Interface
92
Data Transfer Methods
92
PCI Express/PXI Express Device Data Transfer Methods
92
PXI Express Considerations
93
PXI Express Clock and Trigger Signals
93
PXI Express
93
Chapter 7 Calibration
94
Appendix A Pinout and Signal Descriptions
95
Figure A-1. NI 6612 Pinout
96
Appendix B Technical Support and Professional Services
97
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National Instruments NI 6612 Specifications
General
Brand
National Instruments
Model
NI 6612
Category
Computer Hardware
Language
English
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