NVIDIA Jetson TX2/TX2i OEM Product Design Guide
JETSON TX2/TX2i OEM PRODUCT | DESIGN GUIDE | 20180618 77
14.0 UNUSED INTERFACE TERMINATIONS
14.1 Unused MPIO Interfaces
The follow ing Jetson TX2/TX2i pins (& groups of pins) are MPIO (Multi-purpose Standard CMOS Pad) pins that support either
special function IOs (SFIO) and/or GPIO capabilities. Any unused pins or portions of pin groups listed below that are not used
can be left unconnected.
Table 90. Unused MPIO pins / Pin Groups
SD_CARD, SDIO (TX2i only)
PEXx_REFCLK/RST/CLKREQ/WAKE
MODEM_x, MDM2AP_x, AP2MDM_x
DP0_HPD, DP1_HPD, HDMI_CEC
14.2 Unused SFIO Interface Pins
See the Unused SFIO (Special Function I/O) interface pins section in the Checklist at the end of this document.