Nvidia JETSON TX2 User Manual

NVIDIA Jetson TX2/TX2i OEM Product Design Guide
JETSON TX2/TX2i OEM PRODUCT | DESIGN GUIDE | 20180618 58
10.0 AUDIO
Jetson TX2/TX2i brings four PCM/I2S audio interfaces to the module pins & includes a flexible audio-port sw itching architecture.
In addition, digital microphone & speaker interfaces are provided.
Table 59. Audio Pin Descriptions
Pin #
Module Pin Name
Tegra Signal
Usage/Description
Usage on the Carrier
Board
Direction
Pin Type
F1
AUDIO_MCLK
AUD_MCLK
Audio Codec Master Clock
Expansion Header
Output
CMOS  1.8V
G2
I2S0_CLK
DAP1_SCLK
I2S Audio Port 0 Clock
Bidir
CMOS  1.8V
H1
I2S0_LRCLK
DAP1_FS
I2S Audio Port 0 Left/Right Clock
Bidir
CMOS  1.8V
G1
I2S0_SDIN
DAP1_DIN
I2S Audio Port 0 Data In
Input
CMOS  1.8V
H2
I2S0_SDOUT
DAP1_DOUT
I2S Audio Port 0 Data Out
Bidir
CMOS  1.8V
C15
I2S1_CLK
DAP2_SCLK
I2S Audio Port 1 Clock
GPIO Expansion
Header
Bidir
CMOS  1.8V
D13
I2S1_LRCLK
DAP2_FS
I2S Audio Port 1 Left/Right Clock
Bidir
CMOS  1.8V
C14
I2S1_SDIN
DAP2_DIN
I2S Audio Port 1 Data In
Input
CMOS  1.8V
D14
I2S1_SDOUT
DAP2_DOUT
I2S Audio Port 1 Data Out
Bidir
CMOS  1.8V
G5
I2S2_CLK
DMIC2_DAT
I2S Audio Port 2 Clock
M.2 Key E
Bidir
CMOS  1.8V
H5
I2S2_LRCLK
DMIC1_CLK
I2S Audio Port 2 Left/Right Clock
Bidir
CMOS  1.8V
G6
I2S2_SDIN
DMIC1_DAT
I2S Audio Port 2 Data In
Input
CMOS  1.8V
H6
I2S2_SDOUT
DMIC2_CLK
I2S Audio Port 2 Data Out
Bidir
CMOS  1.8V
E6
I2S3_CLK
DAP4_SCLK
I2S Audio Port 3 Clock
Camera Connector
Bidir
CMOS  1.8V
F5
I2S3_LRCLK
DAP4_FS
I2S Audio Port 3 Left/Right Clock
Bidir
CMOS  1.8V
E5
I2S3_SDIN
DAP4_DIN
I2S Audio Port 3 Data In
Input
CMOS  1.8V
F6
I2S3_SDOUT
DAP4_DOUT
I2S Audio Port 3 Data Out
Bidir
CMOS  1.8V
E16
AO_DMIC_IN_CLK
CAN_GPIO1
Digital Mic Input Clock
Expansion Header
Output
CMOS  1.8V
D16
AO_DMIC_IN_DAT
CAN_GPIO0
Digital Mic Input Data
GPIO Expansion
Header
Input
CMOS  1.8V
G4
DSPK_OUT_CLK
GPIO_AUD3
Digital Speaker Output Clock
Output
CMOS  1.8V
H4
DSPK_OUT_DAT
GPIO_AUD2
Digital Speaker Output Data
Output
CMOS  1.8V
F2
GPIO19_AUD_RST
GPIO_AUD1
Audio Codec Reset or GPIO
Expansion Header
Output
CMOS  1.8V
H3
GPIO20_AUD_INT
GPIO_AUD0
Audio Codec Interrupt or GPIO
Input
CMOS  1.8V
When possible, the follow ing assignments should be used for the I2Sx interfaces.
Table 60. I2S Interface Mapping
Module Pins (Tegra Functions)
I/O Block
Typical Usage
I2S0 (I2S1)
AUDIO
Available (Codec)
I2S1 (I2S2)
CONN
Available (Misc)
I2S2 (I2S3)
AUDIO_HV
Available (WLAN / BT, Modem)
I2S3 (I2S4)
AUDIO_HV
Available (Misc)
NA (I2S6)
DMIC_HV
Jetson TX2: Used for on-module WLAN / BT
Jetson TX2i: Unused  not brought to module pins.

Nvidia JETSON TX2 Specifications

General

Brand	Nvidia
Model	JETSON TX2
Category	Microcontrollers
Language	English