Xilinx AC701 User Manual

58 www.xilinx.com AC701 Evaluation Board
UG952 (v1.3) April 7, 2015
Chapter 1: AC701 Evaluation Board Features
•4 GTP transceivers
•2 GTP transceiver clocks
•2 differential clocks
• 159 ground and 15 power connections
Note: The AC701 board VADJ voltage for HPC connector J30 is determined by the FMC VADJ
power sequencing logic described in
Power Management, page 61.
Table 1-26: HPC Connections, J30 to FPGA U1
J30 FMC1
HPC Pin
Schematic Net Name I/O Standard
FPGA
(U1) Pin
J30 FMC1
HPC Pin
Schematic Net Name I/O Standard
FPGA
(U1) Pin
A2 FMC1_HPC_DP1_M2C_P
(1)
AC14 B1 NC NA NA
A3 FMC1_HPC_DP1_M2C_N
(1)
AD14 B4 NC NA NA
A6 NC NA NA B5 NC NA NA
A7 NC NA NA B8 NC NA NA
A10 NC NA NA B9 NC NA NA
A11 NC NA NA B12 NC NA NA
A14 NC NA NA B13 NC NA NA
A15 NC NA NA B16 NC NA NA
A18 NC NA NA B17 NC NA NA
A19 NC NA NA B20 FMC1_HPC_GBTCLK1_M2C_P NA U4.27
A22 FMC1_HPC_DP1_C2M_P
(1)
AC8 B21 FMC1_HPC_GBTCLK1_M2C_N NA U4.25
A23 FMC1_HPC_DP1_C2M_N
(1)
AD8 B24 NC NA NA
A26 NC NA NA B25 NC NA NA
A27 NC NA NA B28 NC NA NA
A30 NC NA NA B29 NC NA NA
A31 NC NA NA B32 NC NA NA
A34 NC NA NA B33 NC NA NA
A35 NC NA NA B36 NC NA NA
A38 NC NA NA B37 NC NA NA
A39 NC NA NA B40 NC NA NA
C2 FMC1_HPC_DP0_C2M_P
(1)
AE9 D1 CTRL2_PWRGOOD LVCMOS25 P15
C3 FMC1_HPC_DP0_C2M_N
(1)
AF9 D4 FMC1_HPC_GBTCLK0_M2C_P NA U3.27
C6 FMC1_HPC_DP0_M2C_P
(1)
AE13 D5 FMC1_HPC_GBTCLK0_M2C_N NA U3.25
C7 FMC1_HPC_DP0_M2C_N
(1)
AF13 D8 FMC1_HPC_LA01_CC_P LVCMOS25 E17
C10 FMC1_HPC_LA06_P LVCMOS25 G19 D9 FMC1_HPC_LA01_CC_N LVCM OS25 E18
C11 FMC1_HPC_LA06_N LVCMOS25 F20 D11 FMC1_HPC_LA05_P LVCMOS25 G15
C14 FMC1_HPC_LA10_P LVCMOS25 A17 D12 FMC1_HPC_LA05_N LVCMOS25 F15
C15 FMC1_HPC_LA10_N LV CMOS25 A18 D14 FMC1_HPC_LA09_P LVCMOS25 E16
C18 FMC1_HPC_LA14_P LVCMOS25 C21 D15 FMC1_HPC_LA09_N LVCMOS25 D16
C19 FMC1_HPC_LA14_N LV CMOS25 B21 D17 FMC1_HPC_LA13_P LVCMOS25 B20
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Xilinx AC701 Specifications

General

Brand	Xilinx
Model	AC701
Category	Motherboard
Language	English