Chapter 7 Counters
© National Instruments 7-39 X Series User Manual
either the 20 MHz Timebase, the 20 MHz Timebase divided by 2, or the
100 kHz Timebase.
The duty cycle of Frequency Output is 50% if the divider is either 1 or
an even number. For an odd divider, suppose the divider is set to D.
In this case, Frequency Output is low for (D + 1)/2 cycles and high for
(D – 1)/2 cycles of the Frequency Output Timebase.
Figure 7-37 shows the output waveform of the frequency generator when
the divider is set to 5.
Figure 7-37. Frequency Generator Output Waveform
Frequency Output can be routed out to any PFI <0..15> or RTSI <0..7>
terminal. All PFI terminals are set to high-impedance at startup. The FREQ
OUT signal also can be routed to many internal timing signals.
In software, program the frequency generator as you would program one of
the counters for pulse train generation.
For information about connecting counter signals, refer to the Default
Counter/Timer Pinouts section.
Frequency Division
The counters can generate a signal with a frequency that is a fraction of an
input signal. This function is equivalent to continuous pulse train
generation. Refer to the Continuous Pulse Train Generation section for
detailed information.
For information about connecting counter signals, refer to the Default
Counter/Timer Pinouts section.
Frequency
Output
Timebase
FREQ OUT
(Divisor = 5)
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