Chapter 9 Digital Routing and Clock Generation
X Series User Manual 9-8 ni.com
PXI and PXI Express Clock and Trigger Signals
PXI and PXI Express clock and trigger signals are only available on
PXI Express devices.
PXIe_CLK100
PXIe_CLK100 is a common low-skew 100 MHz reference clock for
synchronization of multiple modules in a PXI Express measurement or
control system. The PXIe backplane is responsible for generating
PXIe_CLK100 independently to each peripheral slot in a PXI Express
chassis. For more information, refer to the PXI Express Specification at
www.pxisa.org.
PXIe_SYNC100
PXIe_SYNC100 is a common low-skew 10 MHz reference clock with a
10% duty cycle for synchronization of multiple modules in a PXI Express
measurement or control system. This signal is used to accurately
synchronize modules using PXIe_CLK100 along with those using
PXI_CLK10. The PXI Express backplane is responsible for generating
PXIe_SYNC100 independently to each peripheral slot in a PXI Express
chassis. For more information, refer to the PXI Express Specification at
www.pxisa.org.
PXI_CLK10
PXI_CLK10 is a common low-skew 10 MHz reference clock for
synchronization of multiple modules in a PXI measurement or control
system. The PXI backplane is responsible for generating PXI_CLK10
independently to each peripheral slot in a PXI chassis.
Note PXI_CLK10 cannot be used as a reference clock for X Series devices.
PXI Triggers
A PXI chassis provides eight bused trigger lines to each module in a
system. Triggers may be passed from one module to another, allowing
precisely timed responses to asynchronous external events that are being
monitored or controlled. Triggers can be used to synchronize the operation
of several different PXI peripheral modules.
On X Series devices, the eight PXI trigger signals are synonymous with
RTSI <0..7>.
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