Xilinx AC701 User Manual

AC701 Evaluation Board www.xilinx.com 65
UG952 (v1.3) April 7, 2015
Feature Descriptions
VCCO_VADJ Voltage Control
The FMC VCCO_VADJ rail is set to 2.5V. When the AC701 board is powered on, the state
of the FMC_VADJ_ON_B signal wired to header J8 is sampled by the TI UCD90120A
controller U9. If a jumper is installed on J8, signal FMC_VADJ_ON_B is held low, and TI
controller U9 energizes the FMC VCCO_VADJ rail at power on.
Removing the jumper at J8 after the board is powered up does not affect the 2.5V power
delivered to the VCCO_VADJ rail and it remains on.
A jumper installed at J8 is the default setting. If a jumper is not installed on J8 at power on,
the signal FMC_VADJ_ON_B is High and the AC701 board does not energize the
VCCO_VADJ 2.5V power.
Installing a jumper at J8 after the AC701 board powers up in this mode turns on the
VCCO_VADJ rail.
In this VCCO_VADJ off mode, you can control when to turn on VCCO_VADJ and to what
voltage level (1.8V, 2.5V or 3.3V).
With VCCO_VADJ off, the FPGA still configures and has access to the TI controller PMBus
and the VADJ_ON_B signal which are wired to FPGA U1 Bank 14. The combination of
these features allows you to develop code to command the VCCO_VADJ rail to be set to
1.8V or 3.3V instead of the default setting of 2.5V.
See AC701 board schematic page 46 for a brief discussion concerning selectable
VCCO_VADJ voltages. The important controller-to-regulator circuit signals are
VCCO_VADJ_EN and FMC_ADJ_SEL[1:0]. In the VCCO_VADJ off mode, controller U9
does not toggle the regulator turn-on signal VCCO_VADJ_EN High, so the U56 regulator
stays off. You must re-program the controller U9 VCCO_VADJ rail settings to the desired
VCCO_VADJ voltage so that the controller expects the new voltage to appear on its MON1
remote sense pin. The FMC_ADJ_SEL[1:0] controller GPIO16 and GPIO17 pins must be set
to the correct logic levels to force the VCCO_VADJ regulator Reset MUX U64 to select the
appropriate RT_CLK and VADJ resistors for the desired voltage as shown in
Table 1-30.
When the new VCCO_VADJ rail settings and Reset MUX logic levels are programmed into
controller U9, the FMC_VADJ_ON_B signal can be driven Low by user FPGA logic and the
controller toggles the VCCO_VADJ_EN signal High to allow the rail to come up at the new
VCCO_VADJ voltage level.
Documentation describing PMBus programming for the UCD90120A controller is
available at Texas Instruments
[Ref 22].
Table 1-30: VCCO_VADJ Voltage Selection
FMC_ADJ_SEL[10] VCCO_ADJ (V)
BIT 1 BIT 0
0 0 2.5V
0 1 1.8V
1 0 3.3V
1 1 NOT USED
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Xilinx AC701 Specifications

General

Form Factor	ATX
FPGA Family	Artix-7
DDR3 Width	32-bit
Ethernet	10/100/1000 Mbps
USB	USB 2.0
Storage	MicroSD card slot
Configuration	JTAG, SPI
Primary Interface	PCIe x4
User I/O	LEDs
USB Ports	1
FPGA	XC7A200T

Summary

Chapter 1: AC701 Evaluation Board Features

Overview

General introduction to the AC701 board and its purpose.

Additional Information

Points to external resources for additional AC701 board information.

AC701 Board Features

Lists the main hardware features available on the AC701 board.

Feature Descriptions

Detailed descriptions of each hardware component and its functionality.

Artix-7 FPGA

Description of the main Xilinx Artix-7 FPGA on the AC701 board.

FPGA Configuration

Explains the methods for configuring the FPGA on the AC701 board.

DDR3 Memory Module

Details the 1 GB DDR3 SODIMM memory module on the AC701 board.

Quad SPI Flash Memory

Describes the 256 Mb Quad SPI flash memory for configuration and data storage.

USB JTAG Module

Explains the onboard USB-to-JTAG module for configuration and debugging.

Clock Generation

Details the clock sources available for the FPGA logic on the AC701 board.

GTP Transceivers

Describes the GTP transceivers for high-speed serial interfaces.

PCI Express Edge Connector

Details the 4-lane PCI Express edge connector for data transfer.

SFP/SFP+ Connector

Describes the SFP/SFP+ connector for network connectivity.

Ethernet PHY

Details the Ethernet PHY for network communication.

HDMI Video Output

Details the HDMI output functionality using an ADV7511 transmitter.

LCD Character Display

Describes the 2-line by 16-character LCD display.

I2C Bus Switch

Explains the I2C bus switch for controlling downstream devices.

User I/O

Covers general purpose user I/O capabilities.

Switches

Power on/off slide switch SW15

Details the slide switch for controlling board power.

FPGA_PROG_B Pushbutton SW9 (Active-Low)

Explains the pushbutton to initiate FPGA reconfiguration.

Configuration Mode Switch SW1

Describes the DIP switch for selecting FPGA configuration modes.

FPGA Mezzanine Card Interface

HPC Connector J30

Details the FMC High Pin Count connector for mezzanine card expansion.

Power Management

VCCO_VADJ Voltage Control

Explains how to control the VCCO_VADJ voltage for FMC cards.

Cooling Fan Control

FPGA Cooling Fan Circuit

Details the circuit for controlling and monitoring the FPGA cooling fan.

XADC Power System Measurement

XADC Header

Describes the header for XADC interface and voltage source options.

Configuration Options

Appendix A: Default Switch and Jumper Settings

User GPIO DIP Switch SW2

Default settings for the user GPIO DIP switch SW2.

Configuration DIP Switch SW1

Default settings for the FPGA configuration mode DIP switch SW1.

Default Jumper Settings

Lists the default configurations for various jumpers on the AC701 board.

Appendix B: VITA 57.1 FMC Connector Pinouts

FMC HPC Connector Pinout

Pinout diagram for the FMC HPC connector on the AC701 board.

Appendix C: Master Constraints File Listing

AC701 Board XDC File Listing

Lists the Xilinx Design Constraints (XDC) for AC701 board designs.

Appendix D: Board Setup

Installing the AC701 Board in a PC Chassis

Step-by-step guide for installing the AC701 board into a PC chassis.

Appendix E: Board Specifications

Dimensions

Physical dimensions of the AC701 evaluation board.

Environmental

Operating temperature, humidity, and voltage specifications.

Appendix F: Additional Resources

Xilinx Resources

Links to Xilinx support resources like documentation and forums.

Solution Centers

Information on Xilinx design support and troubleshooting services.

References

List of Xilinx documents and vendor websites for further information.

Appendix G: Regulatory and Compliance Information

Declaration of Conformity

Formal statement of the product's compliance with EU directives.

Electromagnetic Compatibility

Details compliance with EMC standards like EN 55022 and EN 55024.

Safety

Lists safety standards like IEC 60950-1 for IT equipment.