ARM MPS3 User Manual

2.9 Video HDLCD interface
The HDMI controller and HDMI connector on the MPS3 board enable you to implement an HDLCD
interface.
The external controller is a frame buffer device that can display up to 1920 × 1080p resolution at 60fps.
Note
Support for higher resolutions up to 1080p depends on the timing performance of your FPGA image.
The HDMI controller also supports I
2
S audio from the FPGA.
The following figure shows a video HDLCD interface example design.
MPS3 FPGA Prototyping Board
FPGA
Processor
Bus matrix
HDLCD PLL OSC5
23.75MHz
DDR4
Dynamic
Memory
Controller
HDMI
controller
TDA 19988
24-bit RGB data,
synch and clock
I
2
S
I
2
C
HDMI
Figure 2-14 MPS3 board video HDLCD interface example design
Related information
A.7 HDMI Type A female connector on page Appx-A-85
1.3 Location of components on the MPS3 board on page 1-15
2 Hardware description
2.9 Video HDLCD interface
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ARM MPS3 Specifications

General

Brand	ARM
Model	MPS3
Category	Motherboard
Language	English