Display
NVIDIA Jetson TX2 NX DG-10141-001_v1.1 | 38
7.2.2 HDMI
A standard HDMI V2.0 interface is supported. These share the same set of interface pins, so
either DisplayPort or HDMI can be supported natively.
Figure 7-7. HDMI Connection Example
Jetson
10 0k Ω
10 kΩ
10 kΩ
VDD_3V3_HDMI
1. 8kΩ
1. 8kΩ
VDD_5V0_HDMI_CON
Tegra
- HDMI
HDMI_DPx_TXDN3
HDMI_DPx_TXDP3
HDMI_DPx_TXDN2
HDMI_DPx_TXDP2
HDMI_DPx_TXDN1
HDMI_DPx_TXDP1
HDMI_DPx_TXDN0
HDMI_DPx_TXDP0
DP_AUX_CHx_P
DP_AUX_CHx_N
DP_AUX_CHx_HPD
eDP
HDMI / DP
HDMI_CEC
10 kΩ
10 0kΩ
88/96
92/100
90/98
94
41/65
39/63
47/71
45/69
53/77
59/83
57/81
51/75
DPx_HPD
DPx_AUX_P
DPx_AUX_N
HDMI_CEC
DPx_TXD3_N
DPx_TXD3_P
DPx_TXD2_N
DPx_TXD2_P
DPx_TXD1_N
DPx_TXD1_P
DPx_TXD0_N
DPx_TXD0_P
MOD_SLE EP*
0. 1uF
0. 1uF
0. 1uF
0. 1uF
0. 1uF
0. 1uF
0. 1uF
0. 1uF
499Ω,1%
VDD_1 V8
R
S
R
S
R
S
R
S
R
S
R
S
R
S
R
S
See
Note 4
T PD4E 02B 04 DQO R
VDD_5 V_ IN
HDMI
Type A
H P_ DE T
+5V
D D C/ CE C_ GN D
SDA
SCL
RESE RVED
CEC
CK–
CK_SHIELD
CK+
D0–
D0_SHIELD
D0+
D1–
D1_SHIELD
D1+
D2–
D2_SHIELD
D2+
1
3
5
11
7
9
13
15
17
19
2
10
12
6
8
14
16
18
4
VDD_3 V3 _SY S
VDD_3V3_HDMI
10 kΩ
10 0k Ω
0. 1uF
Load Switch
EN
IN OUT
Lev el Shif ter
1.8V 5V
CEC Lev el
Shifter Circuit
(se e not e)
Lev el Shif ter
3.3V 5V
Load Switch
EN
IN OUT
FET
DG
S
0 / 1
Notes:
1. Level shifters required on DDC/HPD. NVIDIA
®
Tegra
®
X2 pads are not 5V tolerant and cannot directly
meet HDMI VIL/VIH requirements. HPD level shifter can be non-inverting or inverting. HPD level
shifter on the Jetson TX2 NX Developer Kit is inverting.
2. If EMI/ESD devices are necessary, they must be tuned to minimize the impact to signal quality, which
must meet the timing and electrical requirements of the HDMI specification for the modes to be
supported. See requirements and recommendations in the related sections of Table 7-9.
3. The DP1_TXx pads are native DP pads and require series AC capacitors (ACCAP) and pull-downs (RPD)
to be HDMI compliant. The 499Ω, 1% pull-downs must be disabled when Jetson TX2 NX is off or in
sleep mode to meet the HDMI VOFF requirement. The enable to the FET, enables the pull-downs when
the HDMI interface is to be used. Chokes between pull-downs and FET are optional improvements for
HDMI 2.0 operation.
4. Series resistors RS are required. See the RS section of Table 7-9 for details.
5. See reference design for CEC level shifting/blocking circuit.