PADS
NVIDIA Jetson TX2 NX DG-10141-001_v1.1 | 67
sample the clock at the input to help with read timing. Therefore, the SDMMC_CLK pin may
benefit from enabling Schmitt-trigger mode. Care should be taken if the Schmitt-trigger mode
setting is changed from the default initialization mode as this can influence interface timing.
12.3 Pins Pulled and Driven High During
Power-ON
The Jetson TX2 NX is powered up before the carrier board (See Section 5.1). Table 12-1 lists
the pins on Jetson TX2 NX that default to being pulled or driven high. Care must be taken on
the carrier board design to ensure that any of these pins that connect to devices on the carrier
board (or devices connected to the carrier board) do not cause damage or excessive leakage to
those devices. Some of the ways to avoid issues with sensitive devices are:
External pull-downs on the carrier board that are strong enough to keep the signals low
are one solution, given that this does not affect the function of the pin.
Buffers or level shifters can be used to separate the signals from devices that may be
affected. The buffer and shifter should be disabled until the device power is enabled.
Table 12-1. Pins Pulled and Driven High by Tegra X2 Prior to SYS_RESET*
Inactive
Jetson TX2 NX Pin Power-ON
reset Default
Pull-up
Strength (kΩ)
Jetson TX2 NX Pin Power-ON reset
Default
Pull-up
Strength (kΩ)
MOD_SLEEP* Driven high ~100 UART1_RXD Internal pull-up ~100
FORCE_RECOVERY* Internal pull-up ~100 UART2_TXD Internal pull-up ~100
SDMMC_CMD Internal pull-up ~19.5 UART2_RXD Internal pull-up ~100
SDMMC_DAT0 Internal pull-up ~19.5 SPI0_CS0* Internal pull-up ~100
SDMMC_DAT1 Internal pull-up ~19.5 SPI0_CS1* Internal pull-up ~100
SDMMC_DAT2 Internal pull-up ~19.5 SPI1_MOSI Internal pull-up ~100
SDMMC_DAT3 Internal pull-up ~19.5 SPI1_MISO Internal pull-up ~100
SPI1_CS0* Internal pull-up ~100
SPI1_CS1* Internal pull-down ~100
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