Xilinx AC701 User Manual

54 www.xilinx.com AC701 Evaluation Board
UG952 (v1.3) April 7, 2015
Chapter 1: AC701 Evaluation Board Features
Table 1-24 lists the GPIO Connections to FPGA U1.
Table 1-24: GPIO Connections to FPGA U1
FPGA Pin (U1) Schematic Net Name I/O Standard GPIO Component Pin
User LEDs (Active High)
M26 GPIO_LED_0 LVCMOS33 DS2.2
T24 GPIO_LED_1 LVCMOS33 DS3.2
T25 GPIO_LED_2 LVCMOS33 DS4.2
R26 GPIO_LED_3 LVCMOS33 DS5.2
User Directional Pushbutton Switches (Active High)
P6 GPIO_SW_N SSTL15 SW3.3
U5 GPIO_SW_E SSTL15 SW4.3
T5 GPIO_SW_S SSTL15 SW5.3
R5 GPIO_SW_W SSTL15 SW7.3
U6 GPIO_SW_C SSTL15 SW6.3
User CPU_RESET Pushbutton Switch (Active High)
U4 CPU_RESET SSTL15 SW8.3
User 4-Pole DIP Switch (Active High)
R8 GPIO_DIP_SW0 SSTL15 SW2.1
P8 GPIO_DIP_SW1 SSTL15 SW2.2
R7 GPIO_DIP_SW2 SSTL15 SW2.3
R6 GPIO_DIP_SW3 SSTL15 SW2.4
User Rotary Encoder Switch (Active High)
P20 ROTARY_INCB LVCMOS33 SW10.6
N21 ROTARY_PUSH LVCMOS33 SW10.5
N22 ROTARY_INCA LVCMOS33 SW10.1
User SMA Connectors
T8 USER_SMA_GPIO_P SSTL15 J33.1
T7 USER_SMA_GPIO_N SSTL15 J34.1
User GPIO PMOD Male Pin Header
P26 PMOD_0 LVCMOS33 J48.1
T22 PMOD_1 LVCMOS33 J48.2
R22 PMOD_2 LVCMOS33 J48.3
T23 PMOD_3 LVCMOS33 J48.4
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Xilinx AC701 Specifications

General

Brand	Xilinx
Model	AC701
Category	Motherboard
Language	English