138 Rockwell Automation Publication 2080-UM002G-EN-E - March 2015
Chapter 8 Use the High-Speed Counter and Programmable Limit Switch
Underflow (HSCSTS.UNF)
The Underflow status flag is set (1) by the HSC sub-system whenever the
accumulated value (HSCSTS.Accumulator) has counted through the underflow
variable (HSCAPP.UFSetting).
This bit is transitional and is set by the HSC sub-system. It is up to the control
program to utilize, track if necessary, and clear (0) the underflow condition.
Underflow conditions do not generate a controller fault.
Count Direction (HSCSTS.CountDir)
The Count Direction status flag is controlled by the HSC sub-system. When the
HSC accumulator counts up, the direction flag is set (1). Whenever the HSC
accumulator counts down, the direction flag is cleared (0).
If the accumulated value stops, the direction bit retains its value. The only time
the direction flag changes is when the accumulated count reverses.
This bit is updated continuously by the HSC sub-system whenever the controller
is in a run mode.
High Preset Reached (HSCSTS.HPReached)
The High Preset Reached status flag is set (1) by the HSC sub-system whenever
the accumulated value (HSCSTS.Accumulator) is greater than or equal to the
high preset variable (HSCAPP.HPSetting).
This bit is updated continuously by the HSC sub-system whenever the controller
is in an executing mode. Writing to this element is not recommended.
Description Data Format HSC Modes
(1)
(1) For Mode descriptions, see HSC Mode (HSCAPP.HSCMode) on page 126.
User Program Access
HSCSTS.UNF bit 0…9 read/write
Description Data Format HSC Modes
(1)
(1) For Mode descriptions, see HSC Mode (HSCAPP.HSCMode) on page 126.
User Program Access
HSCSTS.CountDir bit 0…9 read only
Description Data Format HSC Modes
(1)
(1) For Mode descriptions, see Count Down (HSCSTS.CountDownFlag) on page 137.
User Program Access
HSCSTS.HPReached bit 2…9 read/write
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