Global memory performance features
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Performance and Optimization
Global memory performance features
The Symmetrix DMX-3 global memory director design provides
point-to-point, nonblocking connectivity between the front-end
channel directors and back-end disk director. Each global memory
director is physically partitioned into four separately addressable
simultaneously accessible regions. These offload engines, utilizing
Symmetrix DMX-3 technology, implement advanced techniques
while securing data integrity and optimizing available resource
usage. This EMC exclusive global memory design managed by
EMC’s Enginuity Storage Operating Environment delivers a high
performance, fault tolerant, ultra-reliable system.
The global memory directors deliver consistently high levels of
system performance, improve responsiveness and consistency of
responsiveness, and manage peak I/O requests through a series of
techniques that essentially eliminate contention for shared global
memory and optimize utilization of system resources. The
underlying principles are:
◆ Global memory is composed of up to eight global memory
directors that provide up to 512 GB (256 GB effective) of global
memory in the DMX-3.
◆ Requests for global memory are expedited to reduce locking.
◆ Requests are intelligently arbitrated to optimize available
resource usage.
This section describes the following Enginuity-supported global
memory performance features:
◆ “Global memory ASICs” on page 118
◆ “Tag Based Caching (TBC)” on page 119
◆ “Fast write capabilities” on page 120
◆ “Dynamic Mirror Service Policy (DMSP) algorithm” on page 120
◆ “Disk Rotational Position Ordering (RPO)” on page 120
◆ “Disk Multiple Priority Queues (DMPQ)” on page 120
◆ “PermaCache option” on page 121
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