178
EMC Symmetrix DMX-3 Product Guide
Data Integrity, Availability, and Protection
Note: “Sparing in Symmetrix systems” on page 211 provides information on
sparing functionality.
Global memory
director data
integrity logic
The global memory director technology implements the following
data integrity logic on the Symmetrix DMX global memory directors:
◆ “Global memory error correction and error verification” on
page 178
◆ “Global memory chip-level redundancy” on page 179
◆ “Longitude redundancy code (LRC)” on page 179
◆ “Byte-level parity checking” on page 179
◆ “Global memory access path protection” on page 180
Global memory
error correction and
error verification
In addition to monitoring recoverable conditions during normal
access, all locations in global memory are periodically read and
rewritten to detect any increase in single-bit errors. This memory
verification technique maintains a record of errors for each memory
segment. If the predetermined (single-bit) error threshold is reached
in a certain segment, the service processor generates a Call Home for
immediate attention.
Constant memory verification to detect and correct single-bit and
nonconsecutive double-bit errors dramatically reduces the potential
for multibit or hard errors. Should a multibit error be detected during
the scrubbing process, it is considered a permanent error. This error is
corrected and the segment is immediately fenced (removed from
service) and the segment's contents are moved to another area
alienable memory.
A service processor Call Home alerts EMC Global Service Call
Centers whenever an unacceptable level of errors has been detected
and a nondisruptive global memory director replacement is ordered.
Customer Service is immediately notified of all call-home alerts, and
a Customer Service Engineer can be dispatched with the appropriate
parts for speedy repair. Even in cases where errors are occurring and
are easily corrected, if they exceed a preset level, the call home is
executed. This represents the EMC philosophy of not accepting any
errors.
Error verification maximizes data availability by significantly
reducing the probability of encountering an uncorrectable error by
preventing bit errors from accumulating in global memory.
To Next Page
Loading...
Need help?
General
