Intel® Server Board S1200V3RP TPS Server Board Power Distribution
Revision 1.2
shows the timing requirements for the power supply being turned on and off from the AC input,
with PSON held low and the PSON signal, with the AC input applied.
Table 69. Output Voltage Timing
Output voltage rise time from each main output.
Output rise time for the 5Vstby output.
All main outputs must be within regulation of
each other within this time.
All main outputs must leave regulation within this
time.
Figure 51. Output Voltage Timing
Table 70. Turn On/Off Timing
Delay from AC being applied to 5VSB being
within regulation.
Delay from AC being applied to all output
voltages being within regulation.
Time all output voltages stay within regulation
after loss of AC. Tested at 75% of maximum
load.
Delay from loss of AC to de-assertion of PWOK.
Tested at 75% of maximum load.
Delay from PSON# active to output voltages
within regulation limits.