Platform Management ArchitectureIntel® Server Board SE7520BD2 Technical Product Specification
108 Revision 1.3
The FML_SINTEX functions as an alert signal while the bus is idle (between stop to start) and
as a clock extension request from the slave device during the transaction itself.
The behavior of the bus and the transactions on the bus are the same as in SMBus (Start, Stop,
repeated start …).
As can be seen from the naming convention, the bus can operate in a SMBUS compatible
mode, where Data Out acts as the SMBUS bi-directional data line and the clock acts as the
SMBUS CLK line.
The main difference between the SMBus and the FML bus is that the FML bus is point-to-point
where there is only one master and one slave. These two devices cannot change their roles.
Each wire in the interface is driven by a single source (Master or Slave), and is not an open-
drain bus.
4.6.4 LPC/Keyboard Controller Style Ports
The FMM interfaces to its host system via the low pin count (LPC) bus. The FMM incorporates
three 8042* keyboard controller style (KCS) ports. These ports can be used for either IPMI 1.5
or Advanced Configuration and Power Interface (ACPI) embedded controller standard
communication. One system implementation is to use the three ports for the IPMI system
management software interface, system management mode interface, and the ACPI embedded
controller interface.
The KCS interface 0 has the ability to interrupt the host by assertion of the SYSIRQ output.
The KCS ports provided by the FMM reside at specific I/O addresses on the host’s LPC bus.
These addresses are programmable by firmware running on the FMM to provide for system
integration flexibility. Externally, these ports are accessible only by the LPC host.
From the LPC Host’s perspective, each KCS slave port uses three registers and occupies two
bytes of I/O space. Each slave port must be mapped to begin at a two-byte address boundary.
Note: These registers must be accessed 8 bits at a time; Sahalee hardware permits only 8-bit
write operations.
The host I/O address that the interfaces respond to is configurable by Sahalee firmware. After a
Sahalee reset, LPCPD#, or LRST#, all LPC keyboard controller style interface registers are
reset to their default values and an interface will not respond to an LPC cycle until its KCS base
address register is programmed.
If more than one KCS interface is mapped to the same base address (not recommended), then
the lowest numbered interface has priority and responds to the LPC cycle.
4.6.5 USB
The USB interface allows a future KVM implementation to act as a target to the host USB
controller. The intention is that the KVM will act as a mass storage class device such as a floppy
or CDROM so that redirection can occur over the network. The target interface is USB 1.1
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