Intel® Server Board SE7520BD2 Technical Product SpecificationPlatform Management Architecture
Revision 1.3 Intel Confidential
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Table 38. Secure Mode Button Actions
ACPI
State
Power Switch Sleep Switch Reset Switch NMI Switch ID Switch
S0 On Protected – No
Action
Protected – No
Action
Protected – No
Action
Unprotected Unprotected
S1 Sleep Unprotected-
Wakes Server
Unprotected Protected – No
Action
Unprotected Unprotected
Standard
and
Advanced
S4/S5
Off
Unprotected –
Powers On
Unprotected
Unprotected Unprotected Unprotected
S0 On Protected – No
Action
Unprotected Protected – No
Action
Unprotected Unprotected
S1 Sleep Protected – No
Action
Unprotected Protected – No
Action
Unprotected Unprotected
Essentials
S4/S5
Off
Protected – No
Action
Unprotected
Protected – No
Action
Unprotected Unprotected
Table 39. Memory RAS Feature Support by Server Management Tier
Memory RAS Feature Essentials Standard Advanced
Inventory No Yes Yes
Correctable Error Reporting No Yes Yes
Uncorrectable Error Reporting Yes Yes Yes
DIMM Sparing Partial
1
Yes Yes
DIMM Mirroring Partial
1
Yes Yes
Note:
1. No SEL logging.
The following diagram shows a logical block diagram of the platform management architecture
implemented on the Server Board SE7520BD2.
Note: The interconnections and blocks shown are to illustrate the functional relationships
between the system management elements, and do not map directly to the exact circuit
implementation of the architecture.