Intel SE7520BD2 Technical Product Specification

Intel® Server Board SE7520BD2 Technical Product Specification Error Reporting and Handling
Revision 1.3 Intel Confidential
119
Error Code Error Message Response
84FF System Event Log Full Warning
The following table lists error codes that are sent to the MM for error logging as BMC pass-
through commands. All commands are of type “Error”. The syntax of error logging is different
between the MM and SEL (that is, the same error is logged differently depending upon whether
it is posted to the SEL or the MM).
Table 56. Error Codes Sent to Management Module
POST Error
Code
POST Error Data
161 Bad CMOS Battery
301 Keyboard failure
102 System Board failure ( Timer tick 2 test failure)
106 Diskette Controller Failure
604 Diskette Drive ? failure
163 Time of the day not set
01298000 The BIOS does not support the current stepping of Processor P0
01298001 The BIOS does not support the current stepping of Processor P1
196 Processor cache mismatch detected.
198 Processor speed mismatch detected.
00019700 Processor P0 failed BIST.
00019701 Processor P1 failed BIST.
00150100 Multi-bit error occurred: forcing NMI DIMM = ??
00150100 Multi-bit error occurred: forcing NMI DIMM = ?? DIMM = ?? ( could not isolate)
289 DIMM D?? is Disabled.
00150900 SERR/PERR Detected on PCI bus ( no source found )
00151100 MCA: Recoverable Error Detected Proc = ??
00151200 MCA: Unrecoverable Error Detected Proc = ??
00151300 MCA: Excessive Recoverable Errors Proc = ??
00151350 Processor MachineCheck Data a Bank = ?? APIC ID = ?? CR4 = ???? ????
00151351 Processor MachineCheck Data b Address = ???? ???? ???? ???? Time Stamp = ???? ????
???? ????
00151352 Processor MachineCheck Data b Status = ???? ???? ???? ????
00151500 Excessive Single Bit Errors Detected
00151720 Parity Error Detected on Processor bus
00151730 IMB Parity/CRC Error
00151700 Started Hot Spare memory Copy. Failed row/rows = ?? and ?? copied to spare row/rows = ??
and ?? ( used on CMIC–HE box )
00151710 Completed Hot Spare memory Copy. Failed row/rows = ?? and ?? copied to spare row/rows =
?? and ?? ( used on CMIC–HE box )
5.3.2 POST Error Beep Codes
The following table lists POST error beep codes. Prior to system video initialization, the BIOS
uses beep codes to inform the user of error conditions. For BMC-generated beep codes, refer to
the BMC EPS.

Intel SE7520BD2 Specifications

General

Brand	Intel
Model	SE7520BD2
Category	Server Board
Language	English