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Omron CQM1H - PROGRAM User Manual

Omron CQM1H - PROGRAM
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387
Special Instructions Section 5-28
Example When IR 00000 is ON in the following example, the frame checksum (0008) is
calculated for the 8 words from DM 0000 to DM 0007 and the ASCII equiva-
lent (30 30 30 38) is written to DM 0010 and DM 0011.
5-28-7 FAILURE POINT DETECTION – FPD(––)
Limitations D and D+8 must be in the same data area when bit 15 of C is ON.
DM 6144 to DM 6655 cannot be used for T or D.
C must be input as a constant.
Description FPD(––) can be used in the program as many times as desired, but each
must use a different D. It is used to monitor the time between the execution of
FPD(––) and the execution of a diagnostic output. If the time exceeds T, an
FAL(06) non-fatal error will be generated with the FAL number specified in C.
@FCS(−−)
DM 0000
#0008
00000
DM 0010
Address Instruction Operands
00000 LD 00000
00001 @FCS(−−)
# 0008
DM 0000
DM 0010
DM 0000 0001
DM 0001 0002
DM 0002 0003
DM 0003 0004
DM 0004 0005
DM 0005 0006
DM 0006 0007
DM 0007 0008
0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
0 800
FCS
calculation
3 0 3 8DM 00113 0 3 0DM 0010
ASCII code
conversion
T: Monitoring time (BCD)
IR, SR, AR, DM, EM, HR, TIM/CNT. LR, #
C: Control data
#
Ladder Symbols Operand Data Areas
FPD(−− )
C
T
D
D: First register word
IR, SR, AR, DM, EM, HR, LR

Table of Contents

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Omron CQM1H - PROGRAM Specifications

General IconGeneral
I/O CapacityUp to 512 points
Power Supply100 to 240 VAC, 50/60 Hz or 24 VDC (depending on model)
Instruction SetBasic and advanced instructions
Operating Temperature0 to 55°C
Program Capacity7.2K to 15.2K steps
Communication PortsRS-232C
Expansion SlotsUp to 3 expansion units
TypeProgrammable Logic Controller (PLC)
CPU TypeRISC
Program Memory7.2K to 15.2K steps
I/O Points512 max
Expansion CapabilityUp to 3 expansion units
Data MemoryRAM (battery backup)

Summary

PRECAUTIONS

1 Intended Audience

Specifies the target personnel for this manual, requiring knowledge of electrical systems and FA systems.

2 General Precautions

Outlines user responsibilities for operating the product according to specifications and consulting representatives for specific applications.

3 Safety Precautions

Details critical safety warnings related to I/O refreshing, touching internal components, disassembly, and power supply handling.

5 Application Precautions

Provides essential safety guidelines for using the PC System, including grounding, power handling, and unit mounting.

SECTION 1 PC Setup and Other Features

1-1 PC Setup

Explains operating parameters for CQM1H control, including default values and how to change them.

SECTION 2 Inner Boards

2-1 High-speed Counter Board

Describes the functions, input modes, comparison operations, and external outputs of the High-speed Counter Board.

2-2 Pulse I/O Board

Details the Pulse I/O Board's support for two pulse inputs and two pulse outputs, including input modes and interrupts.

SECTION 3 Memory Areas

3-1 Memory Area Structure

Explains the memory areas used by the CQM1H PC, including IR, Work, Controller Link status, MACRO operand, Inner Board, Analog, High-speed Counter, and EM areas.

SECTION 4 Ladder-diagram Programming

4-1 Basic Procedure

Outlines the fundamental steps for writing a program, including obtaining I/O lists and drawing ladder diagrams.

4-4 Controlling Bit Status

Details instructions for controlling individual bit status: OUTPUT, OUTPUT NOT, SET, RESET, DIFFERENTIATE UP/DOWN, KEEP.

4-6 Programming Precautions

Provides essential precautions for drawing clear ladder diagrams and inputting programs, emphasizing instruction order and TR bits.

4-7 Program Execution

Describes the CPU Unit's program scan from top to bottom, checking conditions, and executing instructions.

SECTION 5 Instruction Set

SECTION 6 Host Link Commands

6-1 Host Link Command Summary

Provides a summary table of Host Link commands available for CQM1H communications.

6-4 Command and Response Formats

Details the formats for commands issued from the host computer and responses received from the PC.

6-5 Host Link Commands

Lists and describes various Host Link commands for reading and writing data in IR, SR, LR, HR, DM, EM, and AR areas.

SECTION 7 CPU Unit Operation and Processing Time

7-1 CPU Unit Operation

Explains the overall operation flowchart of the CQM1H CPU Unit and defines cycle time.

7-2 Power Interruptions

Details the CPU Unit's behavior during power interruptions and momentary power supply failures.

7-3 Cycle Time

Explains the processes involved in a single execution cycle and their respective processing times.

SECTION 8 Troubleshooting

8-2 Programming Console Operation Errors

Lists common error messages encountered when using the Programming Console and their appropriate responses.

Appendix A Programming Instructions

5-8 Ladder Diagram Instructions

Explains basic instructions like LOAD, AND, OR, and their combinations, including logic block instructions.

5-9 Bit Control Instructions

Covers instructions for controlling individual bit status: OUT, OUT NOT, SET, RESET, DIFU, DIFD, KEEP.

5-14 User Error Instructions: FAILURE ALARM AND RESET – FAL(06) and SEVERE FAILURE ALARM – FALS(07)

Describes instructions for outputting error numbers for operation, maintenance, and debugging, including non-fatal and fatal errors.

5-16 Timer and Counter Instructions

Details instructions for managing timers and counters, including TIM, TIMH, CNT, CNTR, TTIM, STIM, and CTBL.

5-29 Network Instructions

Explains instructions for communicating with other PCs via the Controller Link System, including SEND, RECV, and CMND.

5-30 Communications Instructions

Details instructions for serial communications, including RECEIVE (RXD), TRANSMIT (TXD), CHANGE SERIAL PORT SETUP (STUP), and PROTOCOL MACRO (PMCR).

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