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S7-300 Automation System, Hardware and Installation: CPU 31xC and CPU 31x
A5E00105492-03
9-29
That is, the DP master writes its Data to these intermediate memory address areas
and the CPU reads these data in the user program, and vice versa.
Transfer memory
in the address
area
PROFIBUS
CPU as DP slave
DP master
I/Q
I/Q
Figure 9-7 Intermediate memory in a DP CPU operating as a DP slave
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In 67(3, configure the I/O address areas:
• You can configure up to 32 I/O address areas.
• Maximum length per address area is 32 bytes.
• You can configure a maximum of 244 input bytes and 244 outputs bytes.
The table below shows the principle of address areas. You can also find this figure
in the 67(3 configuration.
Table 9-10 Configuration example for the address areas in intermediate memory
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7\SH 6ODYH
DGGUHVV
/HQJW
K
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1 E 222 A 310 2 Byte Unit
2 A 0 E 13 10 Word Total length
:
32
Address areas in the
DP master CPU
Address areas in the
DP slave CPU
These address area parameters
must be identical for DP master and
DP slave
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