SIGNATURE ANALYSIS
introduction
Signature analysis provides a simple and direct method
of troubleshooting complex digital circuitry to the compo-
nent level. There are two signature analysis modes avail-
able. The first is called kernel test mode. This mode is used
to check the basic processing functions of the instrument. It
covers the CPU, ROM, address bus, and address decoding.
The second mode is a firmware routine referred to as the
signature analysis mode. This mode requires a working
CPU, ROM, RAM, address, and data bus. To verify these,
the normal power-up self-test is performed. Refer to the
pullout pages at the rear of this manual for detailed test
procedures for each test.
Mode Descriptions
The kernel test mode is implemented by forcing an in-
struction on the data bus. This causes the CPU to increment
through memory. The instruction used is an LSRA (Logic
Shift Right-Accumulator
A)
which is a Hex
44.
This is ac-
complished by setting the runlforce data jumper (J1220),
mode jumper (J1320), and GPlB address switch (S1221) as
shown in the tests.
Three tests are provided. They are:
1. GPlB address switch and buffer test. This test is used
if the kernel test mode or signature analysis mode
does not work, and other electrical conditions neces-
sary (listed with each test) have been verified.
2. CPUIaddress test. Use this test when a system error,
unknown power-up condition, address bus or address
decoding problem is suspected or reported via the
front panel error codes.
3.
ROM test. Used when a ROM error is reported via the
front panel error codes or a power-up condition is
incorrect.
turned on. This verifies CPU, ROM, RAM, and bus
lines. The display check is the way the display illumi-
nates in signature analysis mode. The 521 on each
display (if correct) verifies that adjacent lines on the
display drivers are not shorted and the lines used are
functioning,
2.
Addressldata buffer test. Verify address buffer with
this test (checks unbuffered address lines, but they
should be good if self-test works). Also checks data
bus and buffer, which indicates if keyboard encoder
(U1421) and GPlB chip (U1001) are putting out cor-
rect data.
3.
Addressable latch test. Checks the three addressable
latches.
Verifies operation of:
a. Dim and relay latch
(U1315)
b. Serial output and partial display
(R
141 1
)
c. Blink control latch (U1314)
4. GPlB chip test. Checks for correct data output from
U1001. This is not a functional test of the IC. It is used
to detect data bus errors from the addressldata buffer
test.
5. Keyboard encoder test. Provides a complete function-
al check of keyboard encoder
(U1421). Use it to find
data bus errors from addressldata buffer test. Also,
mechanical problems can be traced (such as front
panel switch problems) since necessary input condi-
tions are given.
6.
Logic supply shift register test. Provides a
troubleshooting method for finding faults in the logic
supply shift registers (such as incorrect data trans-
ferred to D-to-A converters).
The signature analysis mode is implemented by setting
the mode jumper (J1320) to the signature analysis mode.
This runs a firmware routine, which exercises the hardware
in the instrument.
How To
Use
Signature Analysis
The Troubleshooting Chart, Table 6-2, shows the avail-
There are six tests provided. They are:
able tests and what is covered by each. The tests may be
performed in any order as long as the Electrical Conditions
Necessary to Perform Test listed with each test procedure
1.
Power-upldisplay checks. These checks are automat-
are met. The If Failure section indicates suggested action if
ic. Power-up self-test runs when the instrument is
a failure is found on that test.
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