~
945424-9701
• Generates all video data, horizontal synchronization, and vertical synchronization
signals for CRT
monitor
• Provides storage (refresh memory) for characters
to
be displayed by CRT monitors
• Provides self-test logic
to
aid in fault isolation.
1.4.4.1 CRT Interface Logic. CRT interface iogic consists
of
two differentiai line receivers for
the seriai keyboard
data
and Terminai Ready from the power/logic pwb, a differential line driver
for
the
Beep Enable signal
to
the
power/logic pwb, and a video line driver (shown in figure 1-32)
to
drive
out
the composite video signal
to
the power/logic pwb.
The differential line receivers and driver provide noise
immunity
for the transmission lines
between the VDT controller and the power/logic pwb.
The video line driver buffers the character-containing video signal NVIDL, and the composite
sync signal, CSQ, combines them
into
one composite video signal,
then
amplifies the signal for
transmission over coaxial cable
to
the power/logic pwb.
1.4.4.2 Built-In Test Logic. Figure 1-33 shows built-in test logic. During normal operation, the
A inputs
of
the four 2-to-l selectors are selected for routing
to
other
logic. The built-in test logic
outputs
are
as
follows:
• BTL =
NTRL
- Terminal Ready from the keyboard. Passed
to
CRU interface
as
received.
• BKBINL = TKBL - Serial Keyboard Data from keyboard.
• BBTSL =
PREVWlQ
- State
of
VDT controller prior
to
last Word Select (CRU
output
bit F
1
6)
• NLEDL = NLEDL * - Enable for Self Test LED (shared by
both
controllers
on
a
2-controller VDT controller pwb
).
If
second controller
is
in self-test mode, NLEDL * =
0
to
light LED.
When
the
computer
selects
the
self-test mode by setting Test Mode to
1,
CRA9Q
is
1 and causes
the
2-to-l selectors
to
pass the data at their B inputs according
to
table
1-6
and
as
follows:
• BTL = 1 (Terminal Not Ready)
• BKBINL = KBTL - Serial test
output
of
VDT controller UART.
• BBTSL = BTSL - See tabie
i-
7.
• NLEDL = 0 - lights self-test LED.
CRAOQ and
CRAl
Q select one
of
the four inputs
to
the
test
input
multiplexer according
to
table 1-7.
The test mode indicator (located on the VDT controller pwb)
is
lighted whenever CRA9Q
is
high
to
select the self-test mode.
1-46
Digital
Systems Division
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