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Texas Instruments 990 User Manual
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N
I
N
°'
LOGIC
SHEET4
LOGIC
SHEETS
BASIC
CLOCt;
INTERVALS
DOT
INTERVALS
CL~
,NCLK
DOT
RO
DOTRI
DOTR2
DOTR3
DOTR4
,NDOT4
DOTRS
,NDOTS
DOTR6,
NDOT6
D2TRUSQ
D2.TRU6Q
LINE
COUNTEf!
TIMING
TV
SCAN
.INES:
K99L
NCIOT6Q
L!NEAQ
LINEBQ
LINECQ
LINEDQ
LCOL
NENDL
NDOT6Q
~KLC
~KLL
1012121314151610
11
I
I
I
I
I
I
I
I
I
_fU1Jl__JLfl_JU1__IlJ
_fl
-+j91N~_t_____r--i_
_
_JI
-~·
_
_fl___
___
_J
___
___fl__
____
·--··
__
____.L__,
__
_
_____
_JL__
__
-,_
_fl_
__
_
__r-----,__
__
,
--i___r------,_
___
,
j..-----··
636
nsEC
------l
11.004
MHZ
1.57
MHZ
0
'
2
3
•
5
~
7
s
9
10
11
12
13
14
15
0
-~--
___
__s---,_
_c--
635µ5EC
--=i_
TllllllllJT-
~
TYPIC1\L
ROW
FOR
1920-CHARACTER
DISPLAY
_L_Lli_LLL
I
I
I
I
I
I
I
I
_LL
L__fULnJlJl.SL.n__n_
-L_.JL._fl___Jl_J--i_
-,_
___
__r--i__~--i_
L._
_J
L_
_r----·--
1018
•SEC
---::i._
1111111111
lllllTT
TYPICAL
ROW
FOil
960--CHARACTER
DISPLAY
6
7
S
0
I
15,720
HZ
(63.5
SEC
PERIOD)
INCREMENT
LINE
COUNTE~!
LINE
COUNTER
(LSB)
LINE
COUNTER
(MSB)
------
LAST
LINE
OF
ROW
____
_L__
END
FRAME
ITITI
LOAD
CHARACTER
COUl~TEI~
LAT•:H
~RESET
CHARACTER
COUNTER
LA'TCH
RESET
OF
LINE
TIMER
LOGIC
VOCABUL.ARY
COUN'TER
AT
MASTER
LOGIC
SHEET
5
,4
(C)136321
A
MNEMONIC
CSQ
ENDI-
,NENDL
HBSI.
HDEtlDL
,NHDENDL
HDE<lSL
HDSL
HSBCI
HSQ
KADC-11
KCH<l-2
K99L
,NK99L
LCOL.
LINE
(A,B,C,D)Q
NKLC
NKLL.
NRSCSL
VBL
VSB<;
VSQ
KLQ(0-7)
DESCRIPTION
COMPOSITE'
SYNC
FF
TWO
HERTZ
CLOCK
RESET
OR
END
OF
FRAME
ENABLE
RESET
OF
CHARACTER
COU1'TER
ANO
LINE
COUNTER
TO
ZERO
("OM
DECODES
A
SPECIFIC
ROW,
LINE
AND
CHARACTER
99
TO
DETERMINE
END.OF
FRAME)
ENABLE
HORIZONTAL
BLANKING
(OCCURS
EVERY
LINE)
ENABLE
RESET
OF
COMPOSITE
SYNC
FF'
(EACH
LINE)
EXCEPT
DURING
VERTICAL
SYNC
ENABLE
RESET
OF
COMPOSITE
SYNC
•F
(EACH
FRAME)
DURING
VERTICAL
SYNC
ENABLE
HORIZONTAL
DRIVE/SYNC
HORIZONTAL
BLANKING
INTERVAL
(El/ERV
LINE)
HORIZONTAL
SYNC
INTERVAL
(EVERY
LINE)
CHARACTER
ADDRESS
COUNTER
(DETERMINES
A
CHARACTER
ADDRESS
FOR
EVERY
INTERVAL
WITHIN
A
FRAME)
BIT
11
IS
MOST
SIGNIFICANT
BIT.
CHARACTER
COUNTER
(THESE
BITS
AND
KAD0--3
ARE
USED
TO
COUNT
THE
CHARACTER
TIMES
FROM
0
TO
99
ON
ANY
LINE)
DECODE
OF
CHARACTER
TIME
99
(THE
END
OF
A
SCAN
l_INE).
END
BLANKING.
ENABLE
LOAD
OF
CHARACTER
ADDRESS
LATCH,
RESETS
LAST
LINE
OF
A
TYPICAL
ROW.
OCCURS
DURING
LINE
9
ON
1920
CHARACTER
D1'>PLAY
AND
LINE
IS
ON
960
CHARACTER
DISPLAY.
(CHARAc·rcR
99
TIMES)
LINc
COUNTER
OUTPUTS
-
RESET
ro
.ZERO
A'T
cND
OF
LINE
(LCOL)
OR
AT
END
OP
FRAME
(ENDL).
LOADS
CHARACTcR
ADDRESS
LATCH
{KLQO·-KLQ7)
CLEARS
CHARACTER
ADDRESS
LATCH
(KLQO·KLQ7)
RESETS
THE
COMPOSITE
SYNC
FF
UNDER
THE
CONTROL
OF
HDENDL
OR
HClEQSL
cNABLE
VERTICAL
BLANKING
VERTICAL
BLANKING
INTERVAL
(EVER'<
FRAME)
VERTICAL
SYNC
INTERVAL
(EVERY
Ffi•AME)
CHARACTER
ADDRESS
LATCH
CONTAINS
THC
ADDRESS
OF
THE
FIRST
CHARACTER
OF
THE
NEXT
SCAN
LINE.
THE
ADDRESS
CHANGES
DURING
THE
LAST
LINE
OF
EVERY
ROW
(AT
HSQ
TIME).
Figure
2-7.
Timer
Signal
Relationships
127
129
Table of Contents
Table of Contents
5
Paragraph Title Page
6
Section I. Theory of Operation
11
General
11
System Description
11
CRT Monitor
12
Power/Logic PWB
13
VDT Controller
17
Interface Descriptions
19
VDT Controller/Computer Interface
20
Single-Bit Operations
20
Multiple-Bit Operations
20
Hardware Interface Signals
22
Keyboard Data (KBDT, 1-8)
28
Keyboard Data Strobe (KBSIN-)
29
Power/Logic PWB-To-VDT Controller Interface
29
Keyboard Data (TET,1,2,T)
29
Terminal Ready (TRD, 1, 2, T)
29
VDT Controller-To-Power/Logic PWB Interface
29
Beep Enable (BET, 1, 2, T)
32
Modem Audio (MODIN)
32
Principles of Operation
33
Mode Keys and Mode Select Logic
33
Power/Logic PWB
34
Buffer Register
45
LED Display
45
Difference Amplifier
53
CRT Monitor
54
CRT Interface Logic
56
Built-In Test Logic
56
Keyboard Logic
57
Model 911 VDT Controller Block Diagram
59
Video Line Driver
61
CRU Interface Logic
62
Model 911 VDT Keyboard Logic
63
CRU Interface Logic
65
Refresh Memory and Control Logic
69
Refresh Memory Block Diagram
70
Refresh Memory Data Path
73
Memory Read and Write Control Logic
75
Memory Addressing Logic
77
Flowchart for Memory Write Operation
79
Flowchart for Memory Read Operation
80
Display Screen Refresh Cycle Flowchart
81
Video Output Logic
83
Model 911 VDT Character Matrix Formats
85
Model 911 VDT Displayed United States Character Set, Including Graphics Symbols
87
Model 911 VDT Alarm Logic
89
Model 911 VDT Time Base Generator Character Synchronization Logic
93
Model 911 VDT Dot Counter Outputs
95
Model 911 VDT Sync Timing Diagram
101
Section II. Maintenance
103
General
103
Maintenance Philosophy
103
Special Test Equipment
103
Model 990 Computer Hot Mock-Up System for 60-Hertz Model 911 VDT Testing
104
Hot Mock-Up System
106
Loading the Diagnostic
106
Using the Diagnostic
106
CD Verb Entry
109
General Maintenance Procedures
110
PWB Preliminary Checkout
110
General Fault Isolation Procedures
110
Keyboard Maintenance Procedures
110
Keyboard Preliminary Checkout
110
Keyboard Fault Isolation Procedures
111
Keyboard Operational Checkout
114
Power/Logic PWB Maintenance Procedures
114
Power/Logic PWB Preliminary Checkout
115
Power/Logic PWB Fault Isolation Procedures
115
VDT Controller Maintenance Procedures
115
VDT Controller Fault Isolation Procedures
118
CRT Monitor Maintenance Procedures
118
CRT Monitor Preliminary Checkout
118
CRT Monitor Fault Isolation Procedures
118
VDT Controller Assembly Configuration
119
CRU Interface Waveforms During Exercise by the CD-C Verb
125
Timer Signal Relationships
128
Alarm Signal Timing Diagram
131
Model 911 VDT Controller Keyboard Logic Timing Diagram
133
United Kingdom Model 911 VDT Keyboard Arrangement, Hexadecimal Codes, Mode Character Positions, ASCII, Special Character Set, and Matrix Chart
147
United Kingdom Model 911 VDT Keyboard Matrix Chart
153
French Model 911 VDT Keyboard Arrangement, Hexadecimal Codes, Mode Character Positions, ASCII, Special Character Set, and Matrix Chart
154
Other manuals for Texas Instruments 990
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122 pages
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Texas Instruments 990 Specifications
General
Brand
Texas Instruments
Model
990
Category
Desktop
Language
English
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