Xilinx KCU105 User Manual

KCU105 Board User Guide www.xilinx.com 37
UG917 (v1.4) September 25, 2015
Chapter 1: KCU105 Evaluation Board Features
GTH Transceivers
[Figure 1-2, callout 13]
The KCU105 board provides access to 20 GTH transceivers:
• Eight of the GTH transceivers are wired to the PCI Express x8 edge connector (P1)
• Eight of the GTH transceivers are wired to the FMC HPC connector (J22)
• One GTH transceiver is wired to the FMC LPC connector (J2)
• One GTH transceiver is wired to SMA connectors (RX: J31, J30 TX: J29, J28)
• Two GTH transceivers are wired to SFP/SFP+ Module connectors (P4, P5)
The GTH transceivers in the XCKU040 device are grouped into four channels described as
Quads. The reference clock for a Quad can be sourced from the Quad above or Quad below
the GTH Quad of interest. There are five GTH Quads on the KCU105 board with connectivity
as shown here:
Quad 224:
• MGTREFCLK0 - not connected
• MGTREFCLK1 - not connected
• Contains 4 GTH transceivers allocated to PCIe lanes 4-7
Quad 225:
• MGTREFCLK0 - PCIE_CLK_Q0_P/N PCIe edge connector clock
• MGTREFCLK1 - not connected
• Contains 4 GTH transceivers allocated to PCIe lanes 0-3
Quad 226:
• MGTREFCLK0 - SMA_MGT_REFCLK_C_P/N SMA GTH clock input
• MGTREFCLK1 - FMC_LPC_GBTCLK0_M2C_C_P/N
• Contains one GTH transceiver allocated to FMC_LPC_DP0_C2M_P/N
• Contains two GTH transceivers allocated to SFP_TX_P/N and RX_P/N SFP/SFP+
connectors SFP0 and SFP1
• Contains one GTH transceiver allocated to SMA_MGT_TX_P/N and SMA_MGT_RX_P/N
SMA connector pairs
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Xilinx KCU105 Specifications

General

Brand	Xilinx
Model	KCU105
Category	Motherboard
Language	English