Xilinx Virtex UltraScale+ FPGAs User Manual

Table 51: RX Equalizer Attributes (cont'd)
Attribute Type Description
CH[0/1]_RX_APT_CFG28B[15:0] 16-bit Adaptation loop override controls. Use the recommended
value from the Wizard.
Bit Description
[15:10] Reserved.
[9] Enable to override FFE Tap HP11 value
according to attribute
CH[0/1]_RX_APT_CFG12B[4:0].
[8] Enable to override FFE Tap HP10 value
according to attribute
CH[0/1]_RX_APT_CFG12B[9:5].
[7] Enable to override FFE Tap HP9 value
according to attribute
CH[0/1]_RX_APT_CFG12B[14:10].
[6] Enable to override FFE Tap HP8 value
according to attribute
CH[0/1]_RX_APT_CFG13A[4:0].
[5] Enable to override FFE Tap HP7 value
according to attribute
CH[0/1]_RX_APT_CFG13A[9:5].
[4] Enable to override FFE Tap HP6 value
according to attribute
CH[0/1]_RX_APT_CFG13A[15:10].
[3] Enable to override FFE Tap HP5 value
according to attribute
CH[0/1]_RX_APT_CFG13B[5:0].
[2] Enable to override FFE Tap HP4 value
according to attribute
CH[0/1]_RX_APT_CFG13B[12:6].
[1] Enable to override FFE Tap HP3 value
according to attribute
CH[0/1]_RX_APT_CFG15A[6:0].
[0] Enable to override FFE Tap HP2 value
according to attribute
CH[0/1]_RX_APT_CFG15A[13:7].
Note: Aribute CH[0/1]_RX_APT_CFG28A[0] must be
enabled to override the enabled loops in
CH[0/1]_RX_APT_CFG28B[15:0].
Use Modes
The GTM RX has the ability to receive serial data using two dierent modulaon schemes: NRZ
and PAM4. NRZ signals contain one bit of informaon per symbol, while PAM4 signals contain
two bits of informaon per symbol. Using PAM4 modulaon doubles the transmied data
bandwidth while maintaining the same unit interval (UI). To program the GTM RX to a desired
signal modulaon mode, the user must congure the aribute RXMODSEL for CH0 or CH1.
Chapter 4: Receiver
UG581 (v1.0) January 4, 2019 www.xilinx.com
Virtex UltraScale+ GTM Transceivers 92
Send Feedback

Xilinx Virtex UltraScale+ FPGAs Specifications

General

Brand	Xilinx
Model	Virtex UltraScale+ FPGAs
Category	Transceiver
Language	English