Xilinx Virtex UltraScale+ FPGAs User Manual

The sampled eye diagram is constructed by plong one sample per symbol located at the CDR
sampling point (aer the equalizer). By plong mulple samples, the image looks like the gure
above. Sampled eye supports both NRZ and PAM4 modulaon, with the only dierence being
that the NRZ eye consists of two amplitude margin levels, and PAM4 with four disnct amplitude
margin levels.
RX Pre-Coder
UltraScale+ GTM receiver supports pre-coding. Pre-coding can be used to reduce receiver DFE
error propagaon by reducing 1-tap burst error runs into two errors for every error event.
Ports and Attributes
The following table denes the aributes required for RX pre-coder control.
Table 57: Pre-Coder Attributes
Attribute Type Description
CH[0/1]_RX_PCS_CFG0 16-bit Reserved.
Bit Name Address Description
RX_PRECODE_ENDIAN [11] In PAM4 mode, this attribute controls pre-coder
received endianness. In NRZ mode, the default
Wizard value must be used.
1’b0: Non-inverting.
1’b1: Inverting.
RX_PRECODE_BYP_EN
[10] In PAM4 mode, this attribute enables pre-coding. In
NRZ mode, the default Wizard value must be used.
1’b0: Enables pre-code.
1’b1: Disables pre-code.
IMPORTANT! In PAM4 mode, if the pre-coder is enabled for the receiver, the transmier pre-coder
should also be enabled for proper data recovery.
RX Gray Encoder
The UltraScale+ FPGA GTM receiver supports two types of binary enconding opons: linear and
Gray coding. By using Gray coding, only one bit error per symbol is made for incorrect decisions,
thus reducing the bit-error rate by more than 33%. Table 58 illustrates the dierences between
linear and Gray Coding.
Chapter 4: Receiver
UG581 (v1.0) January 4, 2019 www.xilinx.com
Virtex UltraScale+ GTM Transceivers 99
Send Feedback

Xilinx Virtex UltraScale+ FPGAs Specifications

General

Brand	Xilinx
Model	Virtex UltraScale+ FPGAs
Category	Transceiver
Language	English