2-14 MAC™ 5000 resting ECG analysis system Revision B
2024917-010
Equipment Overview: Theory of Operation
A copy of primary boot program (pages with ID “Bn” where n is the 3-bit
PCB ID code 1-8) is kept in NAND flash. This is updated whenever
software update happens. The service menu provides a provision to
update the SPI data flash with the primary boot program copy residing
the NAND Flash. For -006 board the FPGA image and Primary boot code
image ID’s are X3 and B3 respectively.
The primary boot program can do a forceful software update, even if a
valid program is present in the NAND Flash, by using a special SD Card,
which has a file, update.com, in the root directory.
FPGA Internal Logic
All of the MAC 5000’s proprietary hardware is contained in a single
Xilinx FPGA that contains:
XBus Controller
Video Interface
LCD Controller with SDRAM frame buffer
Video Waveform Scroller
Interrupt Controller
System Interrupt Generator
Acquisition Module Interface
Thermal Printhead Interface
Serial EEPROM Interface
BBus Interface
Four PWM Analog Outputs
Beep Generator
On Off Programming the NAND Flash
Flashing Flashing Successful completion of programming
Flashing Off Error - Could program all the image files. But
error in programming the status page 'Z0'.
On On Error - Could not program all the image files
as well as the status page 'Z0'.
On Flashing Error - Could not program all the image files.
But the status page 'Z0' updated successfully
DS1 Red DS2 (Green) Status
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