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Sequence Input Instructions Section 3-3
Description OR NOT is used for a normally closed bit connected in parallel. A normally
closed bit is configured to form a logical OR with a logic block beginning with a
LOAD or LOAD NOT instruction (connected to the bus bar or at the beginning
of the logic block). If there is no immediate refreshing specification, the speci-
fied bit in I/O memory is read. If there is an immediate refreshing specification,
the status of the Basic Input Unit’s input terminal is read.
Flags There are no flags affected by this instruction.
Precautions Immediate refresh (!) can be specified for OR NOT. An immediate refresh
instruction updates the status of the input bit just before the instruction is exe-
cuted from a Basic Input Unit (but not Basic Input Units on Slave Racks or for
C200H Group 2 Multi-point Input Units).
Example
3-3-7 AND LOAD: AND LD
Purpose Takes a logical AND between logic blocks.
Ladder Symbol
Variations
Applicable Program Areas
Index Registers ---
Indirect addressing using
Index Registers
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Area OR NOT bit operand
Instruction Operand
LD 000000
AND 000001
AND 000002
OR 000003
AND 000004
LD 000005
AND 000006
OR NOT 000007
AND LD ---
OUT 000008
Logic block Logic block
Variations Creates ON Each Cycle AND Result is ON AND LD
Immediate Refreshing Specification Not supported.
Block program areas Step program areas Subroutines Interrupt tasks
OK OK OK OK
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