818
Subroutines Section 3-19
Applicable Program Areas
Operands N: Subroutine number
Specifies the subroutine number between 0 and 1023 decimal.
Note For CJ1M-CPU11 and CJ1M-CPU21 CPU Units, the subroutine number must
be between the range 0 to 255 decimal.
Operand Specifications
Note For CJ1M-CPU11 and CJ1M-CPU21 CPU Units, the range is 0 to 255 deci-
mal.
Description MCRO(099) calls the subroutine with the specified subroutine number just like
SBS(091). Unlike SBS(091), MCRO(099) operands S and D can be used to
change bit and word addresses in the subroutine, although the structure of
the subroutine is constant.
When MCRO(099) is executed, the contents of S through S+3 are copied to
A600 through A603 (macro area inputs) and the specified subroutine is exe-
cuted. When the subroutine is completed, the contents of A604 through A607
(macro area outputs) are copied to D through D+3 and program execution
continues with the next instruction after MCRO(099).
Block program areas Step program areas Subroutines Interrupt tasks
OK OK OK OK
Area N S D
CIO Area --- CIO 0000 to CIO 6140
Work Area --- W000 to W508
Holding Bit Area --- H000 to H508
Auxiliary Bit Area --- A000 to A444
A448 to A956
A448 to A956
Timer Area --- T0000 to T4092
Counter Area --- C0000 to C4092
DM Area --- D00000 to D32764
EM Area without bank --- E00000 to E32764
EM Area with bank --- En_00000 to En_32764
(n = 0 to C)
Indirect DM/EM
addresses in binary
--- @ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to @ En_32767
(n = 0 to C)
Indirect DM/EM
addresses in BCD
--- *D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
Constants 0 to 1023 (deci-
mal) (See note.)
---
Data Registers ---
Index Registers ---
Indirect addressing
using Index Registers
--- ,IR0 to ,IR15
–2048 to +2047, IR0 to –2048 to
+2047, IR15
DR0 to DR15, IR0 to IR15, IR0+(++)
to IR015+(++)
,–(– –)IR0 to, –(– –)IR15
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