14. Serial I/O
puorG92/C61M
page 189
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2110-1010B90JER
Table 14.6 Registers to Be Used and Settings in UART Mode
Register Bit Function
UiTB 0 to 8 Set transmission data
(1)
UiRB 0 to 8 Reception data can be read
(1)
OER,FER,PER,SUM
Error flag
UiBRG 0 to 7 Set bit rate
UiMR SMD2 to SMD0 Set these bits to 1002 when transfer data is 7 bits long
Set these bits to 101
2 when transfer data is 8 bits long
Set these bits to 1102 when transfer data is 9 bits long
CKDIR Select the internal clock or external clock
STPS Select the stop bit
PRY, PRYE Select whether parity is included and whether odd or even
IOPOL(i=2)
(4)
Select the TxD/RxD input/output polarity
UiC0 CLK0, CLK1 Select the count source for the UiBRG register
CRS
_______ _______
Select CTS or RTS to use
TXEPT Transmit register empty flag
CRD
_______ _______
Enable or disable the CTS or RTS function
NCH Select TxDi pin output mode
CKPOL Set to 0
UFORM LSB first or MSB first can be selected when transfer data is 8 bits long. Set this
bit to 0 when transfer data is 7 or 9 bits long.
UiC1 TE Set this bit to 1 to enable transmission
TI Transmit buffer empty flag
RE Set this bit to 1 to enable reception
RI Reception complete flag
U2IRS
(2)
Select the source of UART2 transmit interrupt
U2RRM
(2)
Set to 0
UiLCH
(3)
Set this bit to 1 to use UART2 inverted data logic
UiERE
(3)
Set to 0
UiSMR 0 to 7 Set to 0
UiSMR2 0 to 7 Set to 0
UiSMR3 0 to 7 Set to 0
UiSMR4 0 to 7 Set to 0
UCON U0IRS, U1IRS Select the source of UART0/UART1 transmit interrupt
U0RRM, U1RRM Set to 0
CLKMD0 Invalid because CLKMD1 is set to 0
CLKMD1 Set to 0
RCSP
_________
Set this bit to 1 to accept as input the UART0 CTS0 signal from the P64 pin
7 Set to 0
NOTES:
1. The bits used for transmit/receive data are as follows: Bit 0 to bit 6 when transfer data is 7 bits long;
bits 7 to 0 when transfer data is 8 bits long; bit 0 to bit 8 when transfer data is 9 bits long.
2. Set bits 5 and 4 in registers U0C1 and U1C1 to 0. Bits U0IRS, U1IRS, U0RRM and U1RRM are
included in the UCON register.
3. Set bits 7 and 6 in registers U0C1 and U1C1 to 0.
4. Set the bit 7 in registers U0MR and U1MR to 0.
i=0 to 2
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