19
19-14
JTAG
32180 Group User's Manual (Rev.1.0)
19.7 Processing Pins when Not Using JTAG
M32R/ECU
JTDI
JTMS
JTCK
JTRST
User board
JTDO
VCCE(5V)
0–100KΩ
0–100KΩ
0–100KΩ
0–100KΩ
0–100KΩ
Note: • Only if the JTRST pin is firmly tied to ground, the JTDO, JTDI, JTMS and JTCLK pins can be processed
by either pullup or pulldown.
19.7 Processing Pins when Not Using JTAG
The following shows how the pins on the chip should be processed when not using JTAG tools.
Figure 19.7.1 Processing Pins when Not Using JTAG (for 240QFP)
M32R/ECU
JTDI
JTMS
JTCK
JTRST
User board
JTDO
VCCE(5V)
0–100KΩ
0–100KΩ
DBI
TRCLK
TRSYNC
TRDATA0–T RDATA 7
EVENT0, EVENT1
0–100KΩ
0–100KΩ
0–100KΩ
0–100KΩ
(OPEN)
(OPEN)
(OPEN)
(OPEN)
Note: • Only if the JTRST pin is firmly tied to ground, the JTDO, JTDI, JTMS and JTCLK pins can be processed
by either pullup or pulldown.
SDIVCC
(OPEN)
Figure 19.7.2 Processing Pins when Not Using JTAG (for 255FBGA)