Specifications
Table 1-18: Marker output (cont.)
Characteristics Description
Offset resolution
10 mV
DC accuracy
(warranted)
±(10% of |output high or low setting| + 50 mV) into 50 Ω
External termination voltage range –2.8 V to +2.8 V
Rise/fall time < 35 ps (20% to 80% of swing) when High = 1.0 V, Low = 0 V
Output current ±28 mA maximum, assuming 1.4 V into 50 Ω load.
Delay from analog AWG70001A: 180 ps ±25 ps
AWG70001
A Option AC: –380 ps ±25 ps
AWG70002A: 755 ps ±25 ps
Variabl
e delay control
Independent control for each marker
Range 0 to 100
ps
Resolution 1 ps
Accuracy ±15 ps
Skew between (+) and (-) outputs
<12ps
Skew between M1 and M2
<15ps
Rand
om jitter on clock pattern
0.4 ps rms (using 0101.. clock pattern) with Hi = 0.25 V, Low = –0.25 V
Tot
al jitter on random pattern
20 p
s
p-p
Using PRBS15 pattern, with Hi = 0.25 V, Low = –0.25 V
Measured at Bit Error Rate = 1e
-12
Aberrations
< ±33% p-p for the first 100 ps following the step transition with 100% reference at 1 ns, for an
am
bient temperature range of 20 ºC to 30 ºC.
Minimum pulse width 80 ps
Am
arker output can c hange logic states on any sample point. However it must remain in a
given l ogic state long enough to satisfy the minimum pulse width specification.
Table 1-19: Clock output
Characteristics Description
The external clock output is a copy of an internal clock generator that is used to create the
DAC sample clock. This clock always operates in the octave range specified below. It is
multiplied and divided to create the effective DAC sampling rate.
Connector type SMA on rear panel
Output impedance 50 Ω AC coupled
Output amplitude
+5 dBm to +10 dBm
Frequency range
6.25 GHz to 12.5 GHz
AWG70000A Series and AWGSYNC01 Technical Reference 1–13