Tektronix AWG70002A User Manual

Specifications
Table 1-19: Clock output (cont.)
Characteristics Description
Frequency resolution
Internal and fixed reference
clock operation
With jitter reduction: 50 MHz
Without jitter reduction: 100 MHz ÷ 2
20
External variable reference
clock operation:
With jitter reduction: Fref ÷ R
Without jitter reduction: Fref ÷ R ÷ 2
20
Fref = reference c lock frequency
R = 4 when 140 MHz < Fref ≤ 240 MHz
R = 2 when 70 MHz < Fref ≤ 140 MHz
R = 1 when 35 MHz ≤ Fref ≤ 70 MHz
Table 1-20: Clock input
Charact
eristics
Descrip
tion
The ext
ernal clock input can be used to create the DAC sample clock. This clock must always
operate in the octave range specified below. It is m ultiplied and divided to create the actual
DAC sample clock.
Connector type SMA on rear panel
Input impedance
50 Ω(AC coupled)
Input amplitude 0 dBm to +10 dBm
Freq
uency range
6.25 GHz to 12.5 GHz
Acceptable frequency drift while the instrument is operating is ±0.1%.
Table 1-21: Trigger input
Characteristics Description
Number of inputs
2
Connector SMA on rear panel
Input impedance
1kΩ or 50 Ω selectable
Polarity Positive or negative selectable
Input voltage range
1kΩ selected
–10Vto10V
50 Ω selected
<5V
RMS
Input voltage minimum amplitude 0.5 V
p-p
minimum
Threshold control
Range –5.0 V to 5.0 V
Resolution 0.1 V
Accuracy
± (5% of |setting| + 0.1 V)
1–14 AWG70000A Series and AWGSYNC01 Technical Reference

Tektronix AWG70002A Specifications

General

Brand	Tektronix
Model	AWG70002A
Category	Inverter
Language	English