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Xilinx VC707 User Manual

Xilinx VC707
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38 www.xilinx.com VC707 Evaluation Board
UG885 (v1.4) May 12, 2014
Chapter 1: VC707 Evaluation Board Features
For more information refer to 7 Series FPGAs GTX/GTH Transceivers User Guide (UG476)
[Ref 6] and 7 Series FPGAs Integrated Block for PCI Express Product Guide for Vivado Design
Suite (PG054) [Ref 7].
MGTXRXP1_114_AF4
AF4 PCIE_RX6_P B41 PETp6 GTXE2_CHANNEL_X1Y5
MGTXRXN1_114_AF3
AF3 PCIE_RX6_N B42 PETn6 GTXE2_CHANNEL_X1Y5
MGTXTXP2_114_AH4
AH4 PCIE_TX5_P A39 PERp5 GTXE2_CHANNEL_X1Y6
MGTXTXN2_114_AH3
AH3 PCIE_TX5_N A40 PERn5 GTXE2_CHANNEL_X1Y6
MGTXRXP2_114_AE6
AE6 PCIE_RX5_P B37 PETp5 GTXE2_CHANNEL_X1Y6
MGTXRXN2_114_AE5
AE5 PCIE_RX5_N B38 PETn5 GTXE2_CHANNEL_X1Y6
MGTXTXP3_114_AG2
AG2 PCIE_TX4_P A35 PERp4 GTXE2_CHANNEL_X1Y7
MGTXTXN3_114_AG1
AG1 PCIE_TX4_N A36 PERn4 GTXE2_CHANNEL_X1Y7
MGTXRXP3_114_AD4
AD4 PCIE_RX4_P B33 PETp4 GTXE2_CHANNEL_X1Y7
MGTXRXN3_114_AD3
AD3 PCIE_RX4_N B34 PETn4 GTXE2_CHANNEL_X1Y7
MGTREFCLK0P_114_AD8
AD8 SI5324_OUT_C_P
U24.28
through C32
MGT_BANK_114
MGTREFCLK0N_114_AD7
AD7 SI5324_OUT_C_N
U24.29
through C31
MGT_BANK_114
MGTREFCLK1P_114_AF8
AF8 NC MGT_BANK_114
MGTREFCLK1N_114_AF7
AF7 NC MGT_BANK_114
Table 1-14: GTX Quad 114 PCIe Edge Connector Connections (Cont’d)
Quad 114
Pin Name
FPGA (U1)
Pin
Net Name
PCIe Edge Connector (P1)
FHG1761
Placement
Pin
PCIe Edge
Pin Name
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Xilinx VC707 Specifications

General IconGeneral
BrandXilinx
ModelVC707
CategoryMotherboard
LanguageEnglish

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