Xilinx VC707 User Manual

42 www.xilinx.com VC707 Evaluation Board
UG885 (v1.4) May 12, 2014
Chapter 1: VC707 Evaluation Board Features
SGMII GTX Transceiver Clock Generation
[Figure 1-2, callout 16]
An Integrated Circuit Systems ICS844021I chip (U2) generates a high-quality, low-jitter,
125 MHz LVDS clock from a 25 MHz crystal (X3). This clock is sent to FPGA U1, Bank 113
GTX transceiver (clock pins AH8 (P) and AH7 (N)) driving the SGMII interface. Series AC
coupling capacitors are present to allow the clock input of the FPGA to set the common
mode voltage. Figure 1-17 shows the Ethernet SGMII clock source.
References
Details about the tri-mode Ethernet MAC core are provided in LogiCORE IP Tri-Mode
Ethernet MAC Product Guide for Vivado Design Suite (PG051) [Ref 8].
The product brief for the Marvell 88E1111 Alaska Gigabit Ethernet Transceiver can be
found at the Marvell website [Ref 20].
The data sheet can be obtained under NDA with Marvell. Contact information is at the
Marvell website [Ref 20].
For more information about the ICS844021 device, go to the Integrated Device Technology
website [Ref 21] and search for part number ICS844021.
USB-to-UART Bridge
[Figure 1-2, callout 17]
The VC707 board contains a Silicon Labs CP2103GM USB-to-UART bridge device (U44)
which allows a connection to a host computer with a USB port. The USB cable is supplied
in the VC707 Evaluation Kit (Type-A end to host computer, Type mini-B end to VC707
board connector J17). The CP2103GM is powered by the USB 5V provided by the host PC
when the USB cable is plugged into the USB port on the VC707 board.
Xilinx UART IP is expected to be implemented in the FPGA logic. The FPGA supports the
USB-to-UART bridge using four signal pins: Transmit (TX), Receive (RX), Request to Send
(RTS), and Clear to Send (CTS).
Silicon Labs provides royalty-free Virtual COM Port (VCP) drivers for the host computer.
These drivers permit the CP2103GM USB-to-UART bridge to appear as a COM port to
communications application software (for example, TeraTerm) that runs on the host
X-Ref Target - Figure 1-17
Figure 1-17: Ethernet 125 MHz SGMII GTX Clock
UG885_c1_17_020612
GND_SGMIICLK
VDD_SGMIICLK
ICS844021I-01
Clock Generator
VDDA
GND_SGMIICLK
XTAL_IN
XTAL_OUT
VDD
1
2
3
5
7
6
U2
R320
1.0MΩ 5%
Q0
4
8
NQ0
VDDA_SGMIICLK
C300
18pF 50V
NPO
C301
18pF 50V
NPO
C28
0.1μF 25V
X5R
C29
0.1μF 25V
X5R
SGMIICLK_XTAL_OUT
GND2
GND2
X2
X1
X3
25.00 MHz
SGMIICLK_Q0_P
SGMIICLK_Q0_N
SGMIICLK_Q0_C_P
SGMIICLK_Q0_C_NSGMIICLK_XTAL_IN
GND_SGMIICLK
GND
OE
2
1
3
4
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Xilinx VC707 Specifications

General

Brand	Xilinx
Model	VC707
Category	Motherboard
Language	English