Xilinx Virtex-5 RocketIO GTP User Manual

Virtex-5 RocketIO GTP Transceiver User Guide www.xilinx.com 203
UG196 (v1.3) May 25, 2007
Analog Design Guidelines
R
Figure 10-2 illustrates the view from the schematic design perspective.
The Virtex-5 Data Sheet provides the required exact voltage level and tolerance ranges of
these analog supplies. Adequate filtering must be provided as illustrated in Figure 10-3.
Xilinx recommends the use of separate (adjustable) voltage regulators for each supply
circuit until full characterization results are available.
Note:
The voltage levels in Figure 10-3 are nominal values! Refer to the GTP transceiver
portion of the Virtex-5 Data Sheet for the exact values based on operating conditions, especially
voltage and temperature.
Figure 10-1: Resistor Calibration Circuit
MGTAVTTTX
RREF
External 50 Ω
Precision (1%)
Resistor
MGTRREF
Package Pin
Internal Resistor
Network
Comparator
UG196_c10_01_110206
Figure 10-2: RREF Resistor Schematic Design Perspective
MGTTXP1_112
MGTRXN1_112
MGTRXN0_112
MGTRREF_112
MGTREFCLKP_112
MGTREFCLKN_112
MGTAVCCPLL_112
MGTRXP0_112
MGTRXP1_112
MGTTXN0_112
MGTTXP0_112
MGTTXN1_112
MGTAVTTTX2_112
MGTAVTTRX_112
MGTAVCC1_112
MGTAVCC2_112
MGTAVTTTX1_112
FF1136
BANK 112
112_MGTVTTTX
U2
R1
P1
V4
P4
P3
T3
N1
T1
N2
T2
M2
U3
N3
R3
R4
UG196_c10_02_110706
M3
U1
112_MGTVTTRX
112_MGTVTTTX
112_MGTAVCC_PLL
112_MGTREFCLKN
112_MGTREFCLKP
112_MGTRX0N
112_MGTRX0P
112_MGTRX1N
112_MGTRX1P
112_MGTTX0N
112_MGTTX0P
112_MGTTX1N
112_MGTTX1P
112_MGTAVCC
R135
49.9
1/10W
1%

Xilinx Virtex-5 RocketIO GTP Specifications

General

Brand	Xilinx
Model	Virtex-5 RocketIO GTP
Category	Transceiver
Language	English