Xilinx ZCU111 User Manual

ZCU111 Board User Guide 86
UG1271 (v1.1) August 6, 2018 www.xilinx.com
Chapter 3: Board Component Descriptions
PS_SRST_B Reset
Depressing and then releasing pushbutton SW3 causes net PS_SRST_B to strobe Low. This
reset is used to force a system reset. It can be tied or pulled High, and can be High during
the PS supply power ramps. When the voltage at IN2 is below its threshold or EN2 (P.B.
switch SW3 is pressed) goes Low, OUT2 (PS_SRST_B) goes Low.
Active-Low reset output RST_B asserts when any of the monitored voltages (IN_) falls below
the respective threshold, any EN_ goes Low, or MR is asserted. RST_B remains asserted for
the reset time-out period after all of the monitored voltages exceed their respective
threshold, all EN_ are High, all OUT_ are High, and MR is deasserted. See the Zynq
UltraScale+ Device Technical Reference Manual (UG1085) [Ref 3] for information on the
resets.
Board Power System
[Figure 2-15, callout 35]
The ZCU111 evaluation board uses power management ICs (PMIC) and power regulators
from Infineon [Ref 25] to supply the core and auxiliary voltages listed in Tabl e 3- 2 9. See
schematic 0381811.
Table 3-29: Power System Devices
Ref Des,
PMBus
ADDR
Cont rol ler
or
Regulator
Rail Name
Voltage
(V)
Max
Current
(A)
INA226
Sensor
INA226
PMBus
ADDR
Sense
Resistor
(Ω)
0381811
Schem.
Page
U 5 3
(0X43)
IRPS5401_A VCCINT_IO_BRAM_PS_SDFEC 0.85 10 U59 0x41
R394:
0.005
47
IRPS5401_B VCC1V8 1.8 2 U61 0x42
R388:
0.005
IRPS5401_C VCCINT_RF 0.85 7 U63 0x49
R389:
0.005
IRPS5401_D Tied to chan. C
IRPS5401_LDO N.C.
U 5 5
(0X44)
IRPS5401_A UTIL_3V3 3.3 10.5
49
IRPS5401_B UTIL_2V5 2.5 2
IRPS5401_C MGT1V2 1.2 6 U66 0x47
R398:
0.005
IRPS5401_D Tied to chan. C
IRPS5401_LDO MGTRAVCC 0.85 0.5 DVM on R399
R399:
0.005
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Xilinx ZCU111 Specifications

General

Brand	Xilinx
Model	ZCU111
Category	Motherboard
Language	English