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Agilent Technologies E4428C User Manual

Agilent Technologies E4428C
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566 Chapter 16
W-CDMA Uplink Digital Modulation for Receiver Test
W-CDMA Uplink Concepts
PRACH Synchronization
Figure 16-83 illustrates the frame timing alignment for the PRACH channel. Delay time is defined by the
sum of the timing offset and timeslot offset minus the Tp-a value.
Figure 16-83 PRACH Synchronization - Frame Timing Alignment
Figure 16-84 illustrates the frame number alignment for the PRACH channel. The frame number is aligned
by the frame sync trigger signal from the BTS. Best results are achieved when the frame clock is set to 80 or
2560 ms, or a system frame number reset signal is used. When the sync trigger is a frame clock of 10, 20, or
40 ms, the signal generator can align frame timing. However, an 80 ms period must equal the cycle of
sub-channel 0 and frame boundary to achieve frame number alignment. (The signal generator’s frame
number alignment can be observed on the 80 ms frame pulse from the rear panel.)

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Agilent Technologies E4428C Specifications

General IconGeneral
BrandAgilent Technologies
ModelE4428C
CategoryInverter
LanguageEnglish

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